Skip to content

Feature: 10 MHz clk out locked independent of rate

Latest

Choose a tag to compare

@bmatiasruben bmatiasruben released this 31 Mar 14:37
· 14 commits to main since this release

Modified the input reference clock for generating the 10 MHz clock out. Now it depends on the REFCLK of the transceivers instead of the txusrclk that changes with the rate.