Release v1.2.0

github-actions released this 11 Apr 09:44

· 67 commits to develop since this release

4373e86

What's Changed

feat(sv): add SystemVerilog support by @bugratufan in #98
feat: SystemVerilog support (parse, generate, GUI, CI) by @bugratufan in #99

Full Changelog: v1.1.3...v1.2.0

Contributors

bugratufan

Assets 2