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z-core

z-core is a from-scratch, deterministic Z80180/Z8S180 CPU and SoC emulator in Rust. It provides the CPU, MMU, interrupts, timers, ASCI, CSI/O, DMA, tracing, and save-state machinery used by native Rust, Python, and WebAssembly hosts. Its first customer is the qns Braille 'N Speak emulator.

The core is no_std + alloc, forbids unsafe code, and keeps guest RAM inside the emulator. Host callbacks are reserved for board-owned external memory and I/O, which keeps the normal fetch and operand path fast.

Start here

Run the workspace tests:

cargo test --workspace

The workspace tests are self-contained. To run the external standard SST conformance corpus as well, initialize its pinned submodule first:

git submodule update --init
cargo run -p z180-cli -- sst --dir tests/sst/v1

Disassemble the included every-mnemonic fixture:

cargo run -p z180-cli -- dis crates/z180-cli/tests/fixtures/dis_every_mnemonic.bin --org 0x4000

Build the Python binding or WebAssembly package by following the README in the corresponding crate:

The architecture describes the as-built data flow. The qns migration guide gives the exact move from the callback compatibility path to core-owned RAM. Clean-room implementation facts and their UM0050 citations are recorded in docs/verification-log.md.

License

Licensed under either Apache-2.0 or MIT, at your option.

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