Favorite tools?

[sampsyo]

Use this thread to paste links to your favorite language-based tools for accelerator design! Self-promotion is allowed, but also show off other stuff you use and love. ✨

[joaobispo]

Going to shamelessly plug a self-promotion here! I develop Clava, an open-source C/C++ transpiler.

It doesn't actually fit as an accelerator design tool, but can be useful to analyze and transform C/C++/OpenCL code. And it has CMake integration.

[joaobispo]

(more self promotion)

In one of the break rooms, Stephen Neuendorffer asked if we could apply the model that Clava uses (e.g. using JavaScript to analyze and transform ASTs), but instead of being over C/C++, doing that over an MLIR AST.

The answer is yes, we could! Clava is built on top of the LARA framework, which can be used to build this kind of transpilers. If the parser/AST is already available as a Java library, it is straightforward to create one of these transpilers (we have actually created several already, i.e. for Java, JavaScript, MATLAB). If the parser is not available as a Java library, it is not a problem (for instance, Clava uses Clang to parse C/C++ code), but it takes more effort.

[soronpo]

Self promoting the tool I only partially presented, DFiant HDL: https://dfianthdl.github.io/intro/first-look/
😉

[soronpo]

Really cool hardware description languages,
Silice: https://github.com/sylefeb/Silice
PipelineC: https://github.com/JulianKemmerer/PipelineC

[JulianKemmerer]

Hey thanks for giving PipelineC a shout out! Loving to watch all the talks at LATTE this year!

Also - doubling down on Silice being cool

[angl-dev]

Another self-promotion here XD. Not a accelerator design tool, but an eFPGA generator/CAD flow: PRGA (GitHub). Could be an interesting target for all sorts of accelerator design tools :)

[angl-dev]

And my picks for accelerator/hardware design frameworks: PyMTL3, HeteroCL.

[ekiwi]

Are there any cool example projects written in PyMTL that you know of? I know of the system level modelling capabilities and the class designed around PyMTL, but do people also use it for designs that they tape out?

[angl-dev]

I've collaborated with them on a recent tapeout. Cannot disclose the detail yet, but it works pretty well. Also PyOCN may be worth checking out.

[stephenneuendorffer]

@benreynwar https://ptolemy.berkeley.edu/books/Systems/

[rachitnigam]

Calyx is a pass-based compiler infrastructure for compilers that generate hardware designs! We've got frontends for Dahlia (an HLS-like language), a systolic array generator, NTT generator, and a WIP TVM frontend. Please let us know if you want to use it in your research!

[joaobispo]

This week we suggested to a MSc student we are advising to check Calyx and see if he could generate some code.

[ekiwi]

It is fairly easy to get running and the documentation is pretty helpful. I recently set it up to show a demo during our group meeting.

[rachitnigam]

@joaobispo feel free to email us if you run into any problems! Thanks for demoing it @ekiwi!

[nmcp88]

Specifically on what @joaobispo said, we are trying to see if Calyx is a good IR, starting from instruction traces of native RISC-V code, transformed into CDFGs which we want to implement into hardware (e.g., tightly coupled loop accelerators etc). Seems like it might be straightforward to transform CDFGs which already represent arithmetic at a low level into the sub-languages of Calyx, no?