No temperature data on 7940HS

[drbawb]

Hi, I have a system with an AMD 7940HS (Zen4/Phoenix Point) which seems to be reading most data except that the temperature columns and overall temperature in corefreq-cli all report as zeroes.

Some version information, I am on what looks to be the latest release of corefreq along with a recent kernel:

$ corefreq-cli -v
2.1.0

$ uname -a
Linux hitomi 6.18.13-arch1-1 #1 SMP PREEMPT_DYNAMIC Wed, 25 Feb 2026 23:12:35 +0000 x86_64 GNU/Linux

Some info from the running system showing zero temperatures:

$ corefreq-cli -s -n -z -n -B -n -k -n -C 1

Processor                           [AMD Ryzen 9 7940HS w/ Radeon 780M Graphics]
|- Architecture                                             [Zen4/Phoenix Point]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a704108]
|- Signature                                                           [  AF_74]
|- Stepping                                                            [      1]
|- Online CPU                                                          [ 16/ 16]
|- Base Clock                                                          [ 99.813]
|- Frequency            (MHz)                      Ratio                        
                 Min   1597.00                    <  16 >                       
                 Max   3992.51                    <  40 >                       
|- Factory                                                             [100.000]
                       4000                       [  40 ]                       
|- Performance                                                                  
                 TGT   3992.51                    <  40 >                       
   |- CPPC                                                                      
                 Min   3992.51                    <  40 >                       
                 Max    898.31                    <   9 >                       
                 TGT      AUTO                    <   0 >                       
   |- Boost                                                            [   LOCK]
                 XFR   5190.26                    [  52 ]                       
                 CPB   5190.26                    [  52 ]                       
   |- P-State                                                                   
                 P1    2195.88                    <  22 >                       
                 P2    1597.00                    <  16 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1397.38                    [  14 ]                       
                 MEM   2794.76                    [  28 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Missing]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Capable]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast Short REP STOSB                                         FSRS   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [Capable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Unable]
|- Limited Early Redirect Window                            AGENPICK   [ Unable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Capable]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [ Unable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Capable]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   < ON>
   |- L1 Region Prefetcher                                     L1 Region   < ON>
   |- L1 Burst Prefetch Mode                                    L1 Burst   < ON>
   |- L2 Stream HW Prefetcher                                  L2 Stream   < ON>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- ACPI Processor C-States                                      _CST   [      3]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- TSC for Performance Profiling                                       [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      3]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [Missing]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [  0:100 C]
|- CPPC Energy Preference                                        EPP   <    128>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  125 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

|- Collaborative Processor Performance Control                  CPPC       < ON>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0     299.44 (  3)   798.50 (  8)  2994.37 ( 30)  3992.50 ( 40)      
   |- CPU #1     299.43 (  3)   798.48 (  8)  2994.31 ( 30)  4092.22 ( 41)      
   |- CPU #2     299.45 (  3)   798.52 (  8)  2994.46 ( 30)  4192.24 ( 42)      
   |- CPU #3     299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4691.19 ( 47)      
   |- CPU #4     299.43 (  3)   798.48 (  8)  2994.31 ( 30)  4491.46 ( 45)      
   |- CPU #5     299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4691.20 ( 47)      
   |- CPU #6     299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4391.76 ( 44)      
   |- CPU #7     299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4591.39 ( 46)      
   |- CPU #8     299.43 (  3)   798.48 (  8)  2994.30 ( 30)  3992.41 ( 40)      
   |- CPU #9     299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4092.32 ( 41)      
   |- CPU #10    299.44 (  3)   798.52 (  8)  2994.44 ( 30)  4192.22 ( 42)      
   |- CPU #11    299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4691.19 ( 47)      
   |- CPU #12    299.43 (  3)   798.49 (  8)  2994.33 ( 30)  4491.50 ( 45)      
   |- CPU #13    299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4691.20 ( 47)      
   |- CPU #14    299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4391.76 ( 44)      
   |- CPU #15    299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4591.39 ( 46)      

[  0] American Megatrends International, LLC.                                   
[  1] 1.09                                                                      
[  2] 11/20/2023                                                                
[  3] Micro Computer (HK) Tech Limited                                          
[  4] Venus series                                                              
[  5] Default string                                                            
[  6] M---7---9---M---0---                                                      
[  7] Default string                                                            
[  8] Default string                                                            
[  9] Shenzhen Meigao Electronic Equipment Co.,Ltd                              
[ 10] F7BSC                                                                     
[ 11] Default string                                                            
[ 12] K---C---0---1---6--                                                       
[ 13] Number Of Devices:2\Maximum Capacity:67108864 kilobytes                   
[ 14] DIMM 0\P0 CHANNEL A                                                       
[ 15] Unknown                                                                   
[ 16] JM5600ASE-48G                                                             
[ 17] DIMM 0\P0 CHANNEL B                                                       
[ 18] Unknown                                                                   
[ 19] JM5600ASE-48G                                                             
[ 20-157] ... blank lines omitted ...                                                                           

Linux:                                                                          
|- Release                                                     [6.18.13-arch1-1]
|- Version              [#1 SMP PREEMPT_DYNAMIC Wed, 25 Feb 2026 23:12:35 +0000]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         96503368 KB
|- Shared RAM                                                          163652 KB
|- Free RAM                                                          54619896 KB
|- Buffer RAM                                                            9088 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [  amd-pstate-epp]
Governor                                                      [         Missing]
CPU-Idle driver                                               [       acpi_idle]
|- Idle Limit                                                 [              C3]
   |- State        POLL      C1      C2      C3                                 
   |-           CPUIDLE ACPI FF ACPI IO ACPI IO                                 
   |- Power          -1       0       0       0                                 
   |- Latency         0       1      18     350                                 
   |- Residency       0       2      36     700                                 

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000   63.01   227  1.4188    0  000000000000010426    0.159088135   0.159088135
001   32.97   227  1.4188    0  000000000000006078    0.092742920   0.092742920
002  150.21   227  1.4188    0  000000000000015429    0.235427856   0.235427856
003  315.89   227  1.4188    0  000000000000029635    0.452194214   0.452194214
004  211.93   227  1.4188    0  000000000000019130    0.291900635   0.291900635
005  292.72   227  1.4188    0  000000000000032027    0.488693237   0.488693237
006  194.20   171  1.0688    0  000000000000021753    0.331924438   0.331924438
007  328.62   171  1.0688    0  000000000000028696    0.437866211   0.437866211
008   82.08   227  1.4188    0  000000000000000000    0.000000000   0.000000000
009   51.03   227  1.4188    0  000000000000000000    0.000000000   0.000000000
010   86.04   171  1.0688    0  000000000000000000    0.000000000   0.000000000
011  150.73   227  1.4188    0  000000000000000000    0.000000000   0.000000000
012   43.14   171  1.0688    0  000000000000000000    0.000000000   0.000000000
013  226.61   171  1.0688    0  000000000000000000    0.000000000   0.000000000
014  117.71   227  1.4188    0  000000000000000000    0.000000000   0.000000000
015  132.11   227  1.4188    0  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):   8.363708496   2.489837646   0.000000000   0.000000000   0.000000000
Power(W) :   8.363708496   2.489837646   0.000000000   0.000000000   0.000000000

Please let me know if there's anything else I can provide. I have tried building from source with the latest master and it seems to behave exactly the same, no temperature data at all. This system is able to read data from k10temp which returns something, not sure how accurate it is but it seems reasonable given my experience with past Zen2 systems:

$ sensors

k10temp-pci-00c3
Adapter: PCI adapter
Tctl:         +41.0°C

... snip ...

amdgpu-pci-c500
Adapter: PCI adapter
vddgfx:      864.00 mV
vddnb:       760.00 mV
edge:         +38.0°C
PPT:           8.18 W  (avg =   8.14 W)
sclk:         800 MHz

[cyring]

Hi,

Can you edit this source code line:

CoreFreq/x86_64/corefreqk.h

Line 13698 in 7ea7203

.thermalFormula = THERMAL_FORMULA_AMD_ZEN4,

and change as below:

	.thermalFormula = THERMAL_FORMULA_AMD_19h,

Next make sure to rebuild

make clean
make

And start CoreFreq again

[cyring]

If it's still not reading temperature, edit this line:

CoreFreq/x86_64/corefreqk.h

Line 13689 in 7ea7203

.Query = Query_AMD_F19h_74h_PerSocket,

And try each of these 2 functions:

	.Query = Query_AMD_F19h_PerSocket,

	.Query = Query_AMD_F19h_11h_PerCluster,

[drbawb]

Thanks, it looks like using .Query = Query_AMD_F19h_PerSocket is the correct thing to change. I did try the other values to experiment in various combinations and these are my findings:

• Using the original ZEN4 thermal formula with .Query = Query_AMD_F19h_PerSocket works! It seems to give me reasonable looking data. (I'm seeing ~41C at idle and it varies quickly under load.)

• Changing .thermalFormula to the 19h value did not seem to work. Based on the query I either see 0c (original), or the correct value (41c), however in the corefreq-cli UI it only shows the temp on one of the cores instead of all of them.

• I tried the other recommended PerCluster .Query as well and that did not work it reported all 0s as the original did.

[cyring]

Thanks, it looks like using .Query = Query_AMD_F19h_PerSocket is the correct thing to change.

Great. This is the first fix I need to apply

Formula: you just have to tell me which one fits best ?

Formula is about the computed value in degree

Whereas Thermal Scope, you can change in the UI Settings window (or as the driver corefreqk.ko parameter), is about the scope of the collect: single package, per Core or per Thread

[drbawb]

Leaving .thermalFormula as its original setting of the AMD_ZEN4 formula seems to be the only thing that produces output, so my total diff looks like this:

diff --git a/x86_64/corefreqk.h b/x86_64/corefreqk.h
index 3c58de0..ba4dd83 100644
--- a/x86_64/corefreqk.h
+++ b/x86_64/corefreqk.h
@@ -13686,7 +13686,7 @@ static ARCH Arch[ARCHITECTURES] = {
        },
 [AMD_Zen4_PHX] = {                                                     /*118*/
        .Signature = _AMD_Zen4_PHX,
-       .Query = Query_AMD_F19h_74h_PerSocket,
+       .Query = Query_AMD_F19h_PerSocket,
        .Update = PerCore_AMD_Family_19h_Query,
        .Start = Start_AMD_Family_19h,
        .Stop = Stop_AMD_Family_19h,

Thanks so much for the fast replies, I love this tool and it's fantastic that we were able to get it working on my new system!

[cyring]

Hello,

Fix is now available on the master branch.

If you have other missing features, feel free to create issues.

I'm not fixing Phoenix2 yet because I have no Users reports on these processors

CoreFreq/x86_64/corefreqk.h

Line 9103 in da396b0

static PROCESSOR_SPECIFIC AMD_Zen4_PHX2_Specific[] = {

---

The Wiki lists the processors supported by CoreFreq, you can prepare your own page or send me various screenshots and CLI outputs

Regards
CyrIng

[drbawb]

Couldn't figure out how to add to the wiki, but here is a screenshot of the updated corefreq-cli running on the box for you:

Below is all the stats gathered with build/corefreq-cli -s -n -z -n -B -n -k -n -M -C 1:

Processor                           [AMD Ryzen 9 7940HS w/ Radeon 780M Graphics]
|- Architecture                                             [Zen4/Phoenix Point]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0a704108]
|- Signature                                                           [  AF_74]
|- Stepping                                                            [      1]
|- Online CPU                                                          [ 16/ 16]
|- Base Clock                                                          [ 99.815]
|- Frequency            (MHz)                      Ratio                        
                 Min   1597.04                    <  16 >                       
                 Max   3992.61                    <  40 >                       
|- Factory                                                             [100.000]
                       4000                       [  40 ]                       
|- Performance                                                                  
                 TGT   3992.61                    <  40 >                       
   |- CPPC                                                                      
                 Min   3992.61                    <  40 >                       
                 Max    898.34                    <   9 >                       
                 TGT      AUTO                    <   0 >                       
   |- Boost                                                            [   LOCK]
                 XFR   5190.39                    [  52 ]                       
                 CPB   5190.39                    [  52 ]                       
   |- P-State                                                                   
                 P1    2195.94                    <  22 >                       
                 P2    1597.04                    <  16 >                       
|- Uncore                                                              [   LOCK]
                 CLK   1397.41                    [  14 ]                       
                 MEM   2794.83                    [  28 ]                       
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [Y]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [Y]    AVX512-DQ [Y]  AVX512-IFMA [Y]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [Y]    AVX512-BW [Y]   AVX512-VL [Y] 
|- AVX512-VBMI  [Y] AVX512-VBMI2 [Y]  AVX512-VNNI [Y]  AVX512-ALG [Y] 
|- AVX512-VPOP  [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [Y] AVX-VNNI-VEX [N]    AVX-FP128 [N]   AVX-FP256 [Y] 
|- BMI1/BMI2  [Y/Y]         CLWB [Y]      CLFLUSH [Y] CLFLUSH-OPT [Y] 
|- CLAC-STAC    [Y]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [Y]       RDSEED [Y]      RDTSCP [Y] 
|- SEP          [Y]          SHA [Y]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [Y]        UMIP [Y] 
|- VAES         [Y]   VPCLMULQDQ [Y]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Missing]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Missing]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Capable]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Capable]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Capable]
|- Fast Short REP MOVSB                                         FSRM   [Capable]
|- Fast Short REP STOSB                                         FSRS   [Capable]
|- Fast-String Operation                                        ERMS   [Capable]
|- Fused Multiply Add                                           FMA4   [Missing]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Capable]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Missing]
|- Memory Bandwidth Enforcement                                  MBE   [Capable]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Capable]
|- Resource Director Technology/PQM                            RDT-M   [Capable]
|- Read Processor Register at User level                       RDPRU   [Capable]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Capable]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Missing]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Capable]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Capable]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Capable]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Missing]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [Capable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [Capable]
   |- IBRS provides same speculation limits                            [Capable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [Capable]
|- Speculative Store Bypass Disable                             SSBD   [Capable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [Capable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Unable]
|- Limited Early Redirect Window                            AGENPICK   [ Unable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [Capable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Capable]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [ Unable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Capable]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Capable]
|- Supervisor Shadow Stack                                       SSS   [Capable]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Capable]
|- Transparent SME                                              TSME   [ Enable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Enable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   < ON>
   |- L1 Region Prefetcher                                     L1 Region   < ON>
   |- L1 Burst Prefetch Mode                                    L1 Burst   < ON>
   |- L2 Stream HW Prefetcher                                  L2 Stream   < ON>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   < ON>
|- System Management Mode                                       SMM-Lock   [ ON]
|- Simultaneous Multithreading                                       SMT   [ ON]
|- PowerNow!                                                         CnQ   [ ON]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   < ON>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [ ON]
   |- I/O MMU                                                      AMD-V   [ ON]
   |- Version                                                     [         0.1]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  2]
|- Counters:          General                   Fixed                           
|           {  6,  6,  4 } x 48 bits            3 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       < ON>
|- C3 UnDemotion                                                 C3U       < ON>
|- Core C6 State                                                 CC6       < ON>
|- Package C6 State                                              PC6       < ON>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x413 ]
|- ACPI Processor C-States                                      _CST   [      3]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     1     1     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Capable]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Capable]
|- TSC for Performance Profiling                                       [Missing]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [ Enable]
|- Performance Supported States                                 _PSS   [      3]
|- Performance Present Capabilities                             _PPC   [      0]
|- Continuous Performance Control                               _CPC   [Missing]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [ 49:100 C]
|- CPPC Energy Preference                                        EPP   <    128>
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [ Enable]
|- Thermal Monitor 2                                             HTC   [ Enable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
   |- Thermal Monitor Trip                                     Limit   [  125 C]
   |- HTC Temperature Limit                                    Limit   [  127 C]
   |- HTC Temperature Hysteresis                           Threshold   [    2 C]
|- Units                                                                        
   |- Power                                               watt   [  0.125000000]
   |- Energy                                             joule   [  0.000015259]
   |- Window                                            second   [  0.000976562]

|- Collaborative Processor Performance Control                  CPPC       < ON>
   |- Capabilities     Lowest      Efficient     Guaranteed        Highest      
   |- CPU #0     299.51 (  3)   798.70 (  8)  2995.11 ( 30)  3993.48 ( 40)      
   |- CPU #1     299.51 (  3)   798.69 (  8)  2995.08 ( 30)  4093.28 ( 41)      
   |- CPU #2     299.45 (  3)   798.52 (  8)  2994.46 ( 30)  4192.24 ( 42)      
   |- CPU #3     299.50 (  3)   798.66 (  8)  2994.98 ( 30)  4692.13 ( 47)      
   |- CPU #4     299.47 (  3)   798.60 (  8)  2994.74 ( 30)  4492.11 ( 45)      
   |- CPU #5     299.44 (  3)   798.50 (  8)  2994.38 ( 30)  4691.20 ( 47)      
   |- CPU #6     299.47 (  3)   798.58 (  8)  2994.67 ( 30)  4392.18 ( 44)      
   |- CPU #7     299.46 (  3)   798.55 (  8)  2994.57 ( 30)  4591.67 ( 46)      
   |- CPU #8     299.43 (  3)   798.48 (  8)  2994.31 ( 30)  3992.42 ( 40)      
   |- CPU #9     299.44 (  3)   798.51 (  8)  2994.43 ( 30)  4092.38 ( 41)      
   |- CPU #10    299.43 (  3)   798.48 (  8)  2994.30 ( 30)  4192.02 ( 42)      
   |- CPU #11    299.44 (  3)   798.51 (  8)  2994.40 ( 30)  4691.22 ( 47)      
   |- CPU #12    299.43 (  3)   798.48 (  8)  2994.31 ( 30)  4491.47 ( 45)      
   |- CPU #13    299.44 (  3)   798.50 (  8)  2994.36 ( 30)  4691.16 ( 47)      
   |- CPU #14    299.43 (  3)   798.49 (  8)  2994.33 ( 30)  4391.68 ( 44)      
   |- CPU #15    299.43 (  3)   798.48 (  8)  2994.31 ( 30)  4591.27 ( 46)      

[  0] American Megatrends International, LLC.                                   
[  1] 1.09                                                                      
[  2] 11/20/2023                                                                
[  3] Micro Computer (HK) Tech Limited                                          
[  4] Venus series                                                              
[  5] Default string                                                            
[  6] M---7---9---M---0---                                                      
[  7] Default string                                                            
[  8] Default string                                                            
[  9] Shenzhen Meigao Electronic Equipment Co.,Ltd                              
[ 10] F7BSC                                                                     
[ 11] Default string                                                            
[ 12] K---C---0---1---6--                                                       
[ 13] Number Of Devices:2\Maximum Capacity:67108864 kilobytes                   
[ 14] DIMM 0\P0 CHANNEL A                                                       
[ 15] Unknown                                                                   
[ 16] JM5600ASE-48G                                                             
[ 17] DIMM 0\P0 CHANNEL B                                                       
[ 18] Unknown                                                                   
[ 19] JM5600ASE-48G                                                             

Linux:                                                                          
|- Release                                                     [6.18.13-arch1-1]
|- Version              [#1 SMP PREEMPT_DYNAMIC Wed, 25 Feb 2026 23:12:35 +0000]
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         96503372 KB
|- Shared RAM                                                          104152 KB
|- Free RAM                                                          84522616 KB
|- Buffer RAM                                                            1640 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <             tsc>
CPU-Freq driver                                               [  amd-pstate-epp]
Governor                                                      [         Missing]
CPU-Idle driver                                               [       acpi_idle]
|- Idle Limit                                                 [              C3]
   |- State        POLL      C1      C2      C3                                 
   |-           CPUIDLE ACPI FF ACPI IO ACPI IO                                 
   |- Power          -1       0       0       0                                 
   |- Latency         0       1      18     350                                 
   |- Residency       0       2      36     700                                 

                              Zen UMC  [14F0]                              
Controller #0                                                Quad Channel  
 Bus Rate  2800 MHz       Bus Speed 2794 MHz           DDR5 Speed 5588 MT/s
                                                                           
 Cha   CL  RCDr RCDw  RP  RAS   RC  RRDs RRDl FAW  WTRs WTRl  WR  clRR clWW
  #0   46   45   45   45   90  135    8   14   32    7   28   84    7   21 
  #1   46   45   45   45   90  135    8   14   32    7   28   84    7   21 
  #2   46   45   45   45   90  135    8   14   32    7   28   84    7   21 
  #3   46   45   45   45   90  135    8   14   32    7   28   84    7   21 
      CWL  RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD
  #0   44   21   20    6    1   15   15    1   13   13    0    0    0    0 
  #1   44   21   20    6    1   15   15    1   14   14    0    0    0    0 
  #2   44   21   21    6    1   15   15    1   14   14    0    0    0    0 
  #3   44   21   21    6    1   15   15    1   13   13    0    0    0    0 
      REFI RFC1 RFC2 RFCsb RCPB RPPB BGS:Alt  Ban  Page  CKE  CMD  GDM  ECC
  #0 10892  615  615  531   0    0    ON OFF  R0W0   0    6   1T    ON   0 
  #1 10892  615  615  531   0    0    ON OFF  R0W0   0    6   1T    ON   0 
  #2 10892  615  615  531   0    0    ON OFF  R0W0   0    6   1T    ON   0 
  #3 10892  615  615  531   0    0    ON OFF  R0W0   0    6   1T    ON   0 
      MRD:PDA   MOD:PDA  WRMPR STAG PDM RDDATA WRD  WRL  RDL  XS   XP CPDED
  #0   40  0     40  0     24    7 0:F:0   34   6    0   54 1174   21   14 
  #1   40  0     40  0     24    7 0:F:0   34   6    0   54 1174   21   14 
  #2   40  0     40  0     24    7 0:F:0   34   6    0   54 1174   21   14 
  #3   40  0     40  0     24    7 0:F:0   34   6    0   54 1174   21   14 
                                                                           
 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    32    4    131072      1024         131072       JM5600ASE-48G
       #1                                                                  
 DIMM Geometry for channel #1                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1                                                                  
 DIMM Geometry for channel #2                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    32    4    131072      1024         131072       JM5600ASE-48G
       #1                                                                  
 DIMM Geometry for channel #3                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0                                                                  
       #1                                                                  

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000 4531.15   181  1.1313   87  000000000000518195    7.907028198   7.907028198
001 4497.46   181  1.1313   87  000000000000673487   10.276596069  10.276596069
002 4530.58   181  1.1313   87  000000000000591213    9.021194458   9.021194458
003 4524.68   181  1.1313   87  000000000000666721   10.173355103  10.173355103
004 4531.27   181  1.1313   87  000000000000660145   10.073013306  10.073013306
005 4530.84   181  1.1313   87  000000000000663039   10.117172241  10.117172241
006 4513.20   181  1.1313   87  000000000000673685   10.279617310  10.279617310
007 4429.56   181  1.1313   87  000000000000636128    9.706542969   9.706542969
008 4531.88   181  1.1313   87  000000000000000000    0.000000000   0.000000000
009 4469.37   181  1.1313   87  000000000000000000    0.000000000   0.000000000
010 4521.14   181  1.1313   87  000000000000000000    0.000000000   0.000000000
011 4523.10   181  1.1313   87  000000000000000000    0.000000000   0.000000000
012 4528.14   181  1.1313   87  000000000000000000    0.000000000   0.000000000
013 4501.54   181  1.1313   87  000000000000000000    0.000000000   0.000000000
014 4522.97   181  1.1313   87  000000000000000000    0.000000000   0.000000000
015 4528.44   181  1.1313   87  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):  60.002990723  77.554519653   0.000000000   0.000000000   0.000000000
Power(W) :  60.002990723  77.554519653   0.000000000   0.000000000   0.000000000

[cyring]

Ryzen 9 7940HS added to the Wiki. Thank you.

---

 DIMM Geometry for channel #0                                              
      Slot Bank Rank     Rows   Columns    Memory Size (MB)                
       #0    32    4    131072      1024         131072       JM5600ASE-48G

You may have noticed the DIMM size is wrongly computed: it's an open issue I have not solved with non-binary DRAM

[cyring]

Hello,

Can you read this MSR which may provide some bits about non binary DDR5 (according to AI) ?

rdmsr -ax 0xc00110e3