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Version-23
Version 23
MCU reliability and diagnostics improvements:
- Watchdog (IWDG): Independent watchdog enabled (~8 s timeout). Refreshed once per main-loop iteration; never in ISRs. A hung main loop or I2C deadlock will cause a device reset so the unit can recover.
- HardFault safe state: On HardFault the MCU drives MT_EN and IP_EN low (RPi power off, charger path off), PWR_EN high, then resets. Ensures safe outputs before reset regardless of fault cause.
- Reset cause: Reset cause is captured at boot and persisted in flash. Exported via I2C Factory Testing: selector 0x08 = this boot’s raw reset flags (e.g. IWDG, POR, NRST); selector 0x09 = last persisted reset cause and sequence from flash. See Behavior Spec §4.4 and §10 for encoding.
- Flash persistence: Persistence record uses hardware CRC and structure version 2. Records with older version or invalid CRC are rejected at load (defaults applied). Old software-CRC records are no longer accepted.
- I2C robustness: Analog and digital input filters enabled (1 I2C clock digital filter) for noise immunity. Stuck-bus recovery remains software-based (e.g. SCL toggling); no hardware I2C timeout.
No change to the external I2C register contract or power/charger behavior beyond the above.