VHDL Digital Hardware Projects made in class
MIPS-like CPU with ALU, load/store, control, jump functions created in Quartus and Modelsim using VHDL.
Vivado IP for a convolution circuit that achieves a speedup of up to 16x compared to a microprocessor implementation. Achieves significant parallelism by utilizing loop unrolling, a sliding window buffer, and multiple clock domains to maximize speed. Has DMA interfaces to read/write from an emulated block ram that utilizes a handshake and a FIFO ip to handle clock domain crossing. Made with friend Quinlan Stewart.