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Releases: deckerjulian/PiPiLogicAnalyzer

PiPiLogicAnalyzer 7.1.1

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@github-actions github-actions released this 24 Sep 19:17
9cd56f1

Application

  • Multi device sets: the boards started through the trigger line were compensated for the
    trigger delay with far too few samples (the delay in clock cycles was divided by the sample
    period in nanoseconds), so their samples were shifted against the board evaluating the trigger.
  • Pattern and edge-out captures whose post-trigger samples do not cover the trigger delay are
    rejected by the settings check instead of failing on the device.
  • LogicAnalyzer Interceptor: the capture mode is chosen by the bit of every channel in the
    samples (channel 0 = GPIO 6), so channels 4–7 in 8 channel mode and 12–15 in 16 channel mode no
    longer read as 0.
  • Dragging a selection in the ruler beyond the left edge produced negative sample numbers; cut
    and delete then removed the wrong samples. Cut no longer deletes when copying was refused.
  • Automatic decoder channel assignment missed capture channel 0 when it matched by id.
  • Changes made while the decoders run (sample edits, decoder settings) are decoded afterwards
    instead of being ignored; the decoders work on a snapshot of the channels.
  • Loading capture settings or a profile in blast mode kept the default post-trigger samples.
  • Aborting a WiFi capture closes the connection properly, which also ends the waiting read.
  • VCD export: the time stamps no longer drift at sample periods that are not whole nanoseconds
    (e.g. 24 MHz).
  • The board self-test dialog can no longer be closed with Esc while the test runs.
  • Smaller fixes: the first pixel column of dense waveforms was drawn as toggling, the burst
    timestamp wraparound was off by one tick, stale input could be read as device details.
  • Unused code removed.

Firmware

  • WiFi: received data is acknowledged to lwIP (tcp_recved); without it the receive window shrank
    with every request until the connection hung after about 11 KB of requests.
  • WiFi: the error callback no longer closes the PCB lwIP has already freed, a closed connection
    no longer returns ERR_ABRT, responses are sent immediately (tcp_output), and a client that
    stops reading is dropped after 5 s.
  • WiFi: received data waits in lwIP instead of blocking the WiFi core on a full event queue, so
    the two cores can no longer block each other during a large transfer.
  • WiFi: an invalid stored IP address keeps the address assigned by DHCP.
  • Captures are rejected when a channel does not fit into the samples of the requested mode
    (Interceptor) instead of silently reading 0; unknown trigger types are answered with
    CAPTURE_ERROR instead of starting an edge capture.
  • Undefined shifts in the burst timestamps and the blast trigger mask fixed; a blast capture
    releases its GPIOs; the power status line cannot overflow its buffer.
  • CMake applies a changed BOARD_TYPE to an existing build directory; unused code removed.

Project

  • publish.ps1 works again after the rename (settings file, image name) and names the images
    like build_all.sh. The VS Code kit uses the SDK 2.1.1 toolchain.
  • Corrected references to gusmanb's original LogicAnalyzer that the rename had changed.
  • The release check also compares the firmware version in CMakeLists.txt with the tag.

Based on and extending the LogicAnalyzer by Agustín Giménez Bernad (gusmanb). Thank you!

Latest build (main, 9cd56f1)

Pre-release

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@github-actions github-actions released this 24 Sep 19:16
9cd56f1

Automatic build of the newest commit on main (9cd56f1): firmware for every board and the application for Windows, macOS and Linux. Not a tested release.

PiPiLogicAnalyzer 7.1.0

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@github-actions github-actions released this 16 Sep 09:34

Project

  • The project is now called PiPiLogicAnalyzer. The Python package is pipilogicanalyzer, the
    command pipilogicanalyzer, the settings live in a directory of that name (the settings of the
    previous name are taken over on the first start) and the environment variables are
    PIPILOGICANALYZER_SETTINGS_DIR and PIPILOGICANALYZER_DECODERS; the previous names still work.
  • The firmware is called PiPiLogicAnalyzer as well: the sources are in firmware/PiPiLogicAnalyzer,
    the images are named PiPiLogicAnalyzer_<BOARD>[_Turbo].uf2 and a board identifies itself as
    PIPI_LOGIC_ANALYZER_<BOARD>_V<major>_<minor>. The application also accepts the previous
    identification, so boards with an older firmware keep working. USB VID/PID (0x1209/0x3020) and
    the hardware of Agustín Giménez Bernad are unchanged.

Application

  • The device list and the multi device dialog only offer detected analyzers; other serial ports
    are no longer listed.
  • Clicking the name of an annotation row (or double-clicking an annotation) opens the row as a
    list in a window of its own: filter, copy (e.g. a disassembly listing), and selecting an entry
    shows it in the waveform.
  • Multi device sets are no longer triggered by the master only: the board of the trigger channel
    evaluates a pattern or an edge (firmware of this project) and starts the other boards, or every
    board waits for an edge on its external trigger input.
  • Pattern triggers use every group of consecutive trigger inputs the firmware reports (Pico:
    channels 1–21 and 22–24 instead of 1–16), fast matching included.
  • C64 bus decoder: the Bus cycles row keeps the value read or written visible when zoomed out
    (R $FFFC=$E2, FFFC=E2, E2) instead of showing only the address.
  • Device → Install or update firmware: every image shows the firmware version it contains, in
    the list and in its description.
  • Channels can be made lower (or taller) to fit more of them on the screen: Alt + mouse wheel,
    View → Taller/Shorter channels (Ctrl+Shift+Up/Down) or the Channel height slider; the
    height is remembered.
  • Help → Online documentation opens the wiki of this project; the wiki of the original software
    by gusmanb, which documents the hardware, has an entry of its own.

Project

  • SECURITY.md (private vulnerability reporting, where problems are plausible) and a Contributor
    Covenant CODE_OF_CONDUCT.md.
  • Corrected license statements: a few bundled sigrok decoders are MIT or BSD, not GPL, and the
    AppImage runtime is distributed with the Linux build. The copies of the Raspberry Pi
    lwipopts.h and pico_sdk_import.cmake carry their BSD-3-Clause notice again.
  • Source files carry a copyright and SPDX-License-Identifier header; pyproject.toml declares
    GPL-3.0-or-later.
  • Pull requests that only change documentation now run the tests as well, so a required check can
    pass.

Firmware

  • Identifies itself as V7_1. A multi device set only accepts boards with the same version, so
    flash every board of a set with this firmware.
  • Trigger type 5: edge trigger that also drives the trigger output.
  • Pattern triggers accept all channels on consecutive GPIOs; the capabilities report
    EDGE_TRIGGER_OUT and PATTERN_GROUPS.

Based on and extending the LogicAnalyzer by Agustín Giménez Bernad (gusmanb). Thank you!