[RISC-V] Use srli instead of srai for 32-bit unsigned mulhi

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The 32-bit unsigned mulhi implementation previously used an arithmetic right shift (srai) to extract the high 32 bits from the widened 64-bit product. While this happens to produce correct results because the sign-extended high bits are discarded, the instruction does not semantically match the unsigned operation.

Using srli better reflects the intended semantics of an unsigned high-half multiply and avoids relying on sign-extension behavior.

No functional behavior change is expected.

Part of #84834, cc @dotnet/samsung
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Pull request overview

This PR improves the semantic correctness of the RISC-V 32-bit unsigned multiply-high implementation by replacing an arithmetic right shift (srai) with a logical right shift (srli). While both instructions produce the same functional result due to how the high bits are discarded, srli better represents the unsigned nature of the operation and aligns with established patterns elsewhere in the codebase.

• Replaced INS_srai with INS_srli in the 32-bit unsigned mulhi code path
• Aligned instruction choice with the semantic meaning of unsigned operations
• Maintained consistency with other zero-extend patterns in the file (e.g., lines 5851, 5866-5867)