JIT: Disallow op2 for mulx to be in edx#125331
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jakobbotsch merged 3 commits intodotnet:mainfrom Mar 10, 2026
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LSRA can still allow an op1 that is defined in another register than edx, even though op1 is constrained to edx. This gets resolved during codegen by first moving op1 to edx. However, that means we must also constraint op2 from _not_ being in edx. This adds similar logic as how shifts already handle similar constraints on the shift count having to be in ecx.
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Pull request overview
Updates xarch LSRA handling for mulx/MultiplyNoFlags to ensure the second operand is not allocated to EDX, aligning LSRA’s operand-location assumptions with codegen’s required move of op1 into EDX/RDX and preventing a codegen assert.
Changes:
- In LSRA, exclude
EDXfromop2register candidates forNI_AVX2(_X64)_MultiplyNoFlags. - Add a JIT regression test reproducing the original assertion failure and validating correct behavior.
- Wire the new regression test into
Regression_ro_2.csproj.
Reviewed changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated 1 comment.
| File | Description |
|---|---|
| src/coreclr/jit/lsraxarch.cpp | Tightens register candidate selection for MultiplyNoFlags so op2 cannot be allocated to EDX. |
| src/tests/JIT/Regression/Regression_ro_2.csproj | Adds the new regression test source file to the merged regression project. |
| src/tests/JIT/Regression/JitBlue/Runtime_125328/Runtime_125328.cs | New regression test covering the MultiplyNoFlags scenario that previously hit the codegen assertion. |
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tannergooding
approved these changes
Mar 9, 2026
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mulxhas a fixed register requirement requiringop1to be inedx. However, LSRA can still allow an op1 that is defined in another register thanedx, even thoughop1is constrained toedx. This gets resolved during codegen by first moving op1 to edx. However, that means we must also constraint op2 from not being in edx. LSRA believes the uses happen simultaneously, even whenop1was defined in a different register, but that's not faithful to what happens in codegen (which needs a separatemovinstruction).This adds similar logic as how shifts already handle similar constraints on the shift count having to be in
ecx.Fix #125328
I think there is a mismatch in LSRA's idealized location model compared to what has to happen in codegen. I am not sure it makes much sense to allow resolving def-use conflicts by changing registers on the uses. I will open a separate PR to experiment with removing these cases.