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fix(core): seed the IPL2 exit state so CIC-6105 titles boot (R-23) - #175

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fix(core): seed the IPL2 exit state so CIC-6105 titles boot (R-23)#175
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Ocarina of Time boots, and runs its own microcode

Closes ledger R-23. CIC-6105 titles — Ocarina of Time, Majora's Mask,
Banjo-Tooie, Donkey Kong 64, Conker, Jet Force Gemini — now boot through
hle_boot.

Their IPL3 is a different program: it opens with a self-descrambling XOR loop
reading 0x44(t3) — DMEM + 0x40, its own image. hle_boot never seeded the IPL2
exit state IPL3 inherits, so t3 was 0 and the descramble read low RDRAM.

Measured, not invented

The registers were captured at IPL3's entry (0xA400_0040) by running the
console's real IPL1/IPL2 out of a PIF ROM dump via real_pif_boot, then keeping
only values identical across ROMs of different CIC variants (Banjo-Tooie/6105
vs Super Mario 64/6102):

at=1, a2=0xA400_1F0C, a3=0xA400_1F08, t0=0xC0, t2=0x40,
t3=0xA400_0000, s4=1, ra=0xA400_1550

v0/v1/a0/a1 and t4t9 are excluded, and asserted absent — they
carry IPL2's running checksum of that cartridge's IPL3 and differ per ROM, so
freezing them would fabricate a value the boot computes. s6 is the CIC seed,
already set per-CIC.

Corroboration and mutation check

  • Banjo-Tooie under HLE now halts at pc=0x800329a8 — the exact PC
    real_pif_boot reaches
    on the same ROM, retired counts within 0.3%. Two
    independent boot paths converging on the same address is stronger evidence than
    either alone.
  • Mutation-checked on t3 alone: remove that one register and Banjo-Tooie
    returns to a NOP sled with RDRAM entirely empty. It is the decisive seed,
    exactly as predicted from reading the 6105 IPL3.

Consequences beyond those titles

  • The commercial capstone's CIC-6105 skip is deleted — nothing left to skip.
  • The T-71-003 witness set doubled, 4 titles → 8:
Title RSP PCs executing real instructions RDP commands
Ocarina of Time 733 17,900
Majora's Mask 732 2,310
Castlevania: Legacy of Darkness 774 33
007: The World Is Not Enough 435 0
Conker's Bad Fur Day 414 0
Jet Force Gemini 343 0
Beetle Adventure Racing! 328 0
Mega Man 64 223 50

Ocarina of Time submitting 17,900 RDP commands is the real F3DEX pipeline running
end to end. Jet Force Gemini scans out 69,479 lit pixels.

n64-systemtest unchanged at 90 suite-wide, Phase 1 categories Failed: 0.

Still open (R-18 remainder)

  • Banjo-Kazooie, 1080 Snowboarding, F-Zero X (CIC-6103/6106) fill IMEM to
    4094 bytes but never start the RSP.
  • Blast Corps and Bomberman 64 (CIC-6102) never load microcode at all.

Not claimed as fixed — a different failure, upstream of the RSP seam.

Gates

cargo fmt --all --check, cargo clippy --workspace --all-targets -- -D warnings,
cargo test --workspace, RUSTDOCFLAGS="-D warnings" cargo doc --workspace --no-deps, pre-commit run markdownlint --all-files — each run separately with
its exit status checked, no pipes. Plus #[ignore]d n64-systemtest, both
commercial capstones, and the microcode witness.

🤖 Generated with Claude Code

Ocarina of Time, Majora's Mask, Banjo-Tooie and Donkey Kong 64 now boot through
hle_boot. Their IPL3 is a different program: it self-descrambles with an XOR loop
that reads 0x44(t3) - DMEM + 0x40, its own image - and hle_boot never seeded the
IPL2 exit state IPL3 inherits, so t3 was 0 and the descramble read low RDRAM.

Measured, not invented. The registers were captured at IPL3's entry (0xA4000040)
by running the console's real IPL1/IPL2 out of a PIF ROM dump through
real_pif_boot, then keeping only the values IDENTICAL across ROMs of different
CIC variants - Banjo-Tooie (6105) compared against Super Mario 64 (6102): at=1,
a2=0xA4001F0C, a3=0xA4001F08, t0=0xC0, t2=0x40, t3=0xA4000000, s4=1,
ra=0xA4001550.

v0, v1, a0, a1 and t4-t9 are deliberately excluded and asserted absent: they
carry IPL2's running checksum of that particular cartridge's IPL3 and differ per
ROM, so freezing them would fabricate a value the boot computes. s6 is the CIC
seed, already set per-CIC.

Corroborated independently rather than by inspection: Banjo-Tooie under HLE now
halts at pc=0x800329a8, the exact PC real_pif_boot reaches on the same ROM, with
retired counts within 0.3%. Mutation-checked on t3 alone - remove it and
Banjo-Tooie returns to a NOP sled with RDRAM entirely empty.

Consequences beyond the four titles. The commercial capstone's CIC-6105 skip is
deleted, since there is nothing left to skip. The T-71-003 microcode witness set
doubled from 4 titles to 8: Ocarina of Time executes 733 distinct RSP
instructions and submits 17,900 RDP commands, Majora's Mask 732 and 2,310,
Conker's Bad Fur Day 414, Jet Force Gemini 343. Jet Force Gemini scans out 69,479
lit pixels.

n64-systemtest is unchanged at 90 suite-wide with Phase 1 categories Failed: 0.

Still open in R-18: Banjo-Kazooie, 1080 Snowboarding and F-Zero X (CIC-6103/6106)
fill IMEM but never start the RSP, and Blast Corps and Bomberman 64 never load
microcode at all.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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📥 Commits

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📒 Files selected for processing (3)
  • crates/rustyn64-core/src/boot.rs
  • crates/rustyn64-test-harness/tests/commercial_boot.rs
  • docs/cart.md
📝 Walkthrough

Walkthrough

hle_boot now seeds ROM-independent IPL2 exit registers required by CIC-6105 IPL3 execution. Unit coverage verifies the register contract, while commercial boot selection, accuracy-ledger evidence, and changelog records are updated.

Changes

CIC-6105 HLE boot support

Layer / File(s) Summary
IPL2 exit-state seeding and unit coverage
crates/rustyn64-core/src/boot.rs
hle_boot seeds measured ROM-independent registers, including the CIC-6105 DMEM base, while checksum-derived registers remain unset and are tested explicitly.
Commercial boot validation and release records
crates/rustyn64-test-harness/tests/commercial_boot.rs, docs/accuracy-ledger.md, CHANGELOG.md
Commercial boot tests select the first sorted .z64 ROM without CIC-6105 filtering; R-23, witness coverage, validation results, and the unreleased changelog entry are updated.

Estimated code review effort: 3 (Moderate) | ~20 minutes

Sequence Diagram(s)

sequenceDiagram
  participant CommercialBoot
  participant hle_boot
  participant CPU
  CommercialBoot->>hle_boot: boot selected commercial ROM
  hle_boot->>CPU: seed ROM-independent IPL2 exit registers
  CPU-->>CommercialBoot: execute IPL3 and report boot progress
Loading

Possibly related PRs

🚥 Pre-merge checks | ✅ 9 | ❌ 1

❌ Failed checks (1 warning)

Check name Status Explanation Resolution
Docs-As-Spec Sync ⚠️ Warning FAIL: rustyn64-core::hle_boot now seeds extra IPL2-exit registers, but the matching docs/cart.md was not changed and the PR body gives no why-no-docs-needed rationale. Update docs/cart.md for the new boot-seeded register state, or state in the PR body that existing boot docs already cover the behavioural change.
✅ Passed checks (9 passed)
Check name Status Explanation
Title check ✅ Passed Matches the Conventional Commits rule: fix(core): imperative subject, no trailing period, and within 72 characters.
Description check ✅ Passed The description is clearly related to the changeset: CIC-6105 boot seeding, real_pif_boot validation, and witness-set expansion.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
Oracle Number Is Stated ✅ Passed PR states the oracle number: docs/STATUS and CHANGELOG both report n64-systemtest at 90 suite-wide, Phase 1 Failed: 0.
Changelog Entry For User-Visible Changes ✅ Passed CHANGELOG.md already has an [Unreleased] entry for the user-facing CIC-6105 HLE fix (ledger R-23).
Measured, Never Tuned ✅ Passed PASS: R-23 in docs/accuracy-ledger.md records the measured IPL2 exit-state values and how they were captured; boot.rs only consumes that recorded set.
Unsafe Stays Out Of The Chip Crates ✅ Passed PASS: crates/rustyn64-core still has #![forbid(unsafe_code)], and structural searches found no unsafe blocks outside the frontend; the patch diff adds none.

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Actionable comments posted: 2

🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Inline comments:
In `@crates/rustyn64-core/src/boot.rs`:
- Around line 313-321: Extend the excluded checksum-register table in the boot
test to include registers 13, 14, 15, and 24 for t5 through t8, alongside the
existing t4 and t9 entries. Ensure every documented t4–t9 register is asserted
as unset while preserving the current v0, v1, a0, and a1 checks.

In `@crates/rustyn64-test-harness/tests/commercial_boot.rs`:
- Around line 130-133: Restrict the boot witness around roms.remove(0) to
CIC-6105: deterministically select a ROM identified as CIC-6105, or classify the
selected ROM and assert that classification before running it. Ensure the test
proves a CIC-6105 ROM was exercised rather than an arbitrary folder entry.

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📥 Commits

Reviewing files that changed from the base of the PR and between 6bc8e05 and e66ddde.

📒 Files selected for processing (4)
  • CHANGELOG.md
  • crates/rustyn64-core/src/boot.rs
  • crates/rustyn64-test-harness/tests/commercial_boot.rs
  • docs/accuracy-ledger.md

Comment thread crates/rustyn64-core/src/boot.rs Outdated
Comment thread crates/rustyn64-test-harness/tests/commercial_boot.rs Outdated
…ices

Review follow-up on R-23.

The exclusion table asserted only t4 and t9 while the documentation claims t4-t9,
so a seed slipping into t5, t6, t7 or t8 would have passed. All six are now
asserted. Listing only the endpoints of a documented range is the same shape of
gap as a comment that states a rule the code does not implement.

Register indices are now named constants (GPR_AT, GPR_A2, GPR_A3, GPR_T0, GPR_T2,
GPR_T3, GPR_S4, GPR_RA) matching the existing GPR_SP, so the seeds read as intent
rather than as bare numbers.

Corrects an overstatement I introduced. The comment said "every CIC variant is
HLE-bootable since R-23 closed", which is wrong: R-18 still has open 6102/6103/
6106 cases. The capstone's actual claim is narrower - whichever title is selected
reaches its own code in RDRAM - and the comment now says that.

Rather than scope the capstone to CIC-6105 as suggested, which would narrow a
general capstone to prove one ticket, it now classifies the selected ROM and
REPORTS whether a 6105 title was exercised. Not an assertion, because a corpus
may legitimately contain none - but said out loud, so "R-23 still holds" is never
inferred from a run that never tested it. Against the staged corpus it prints
"including a CIC-6105 title, so R-23 is exercised".

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
@doublegate

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Antigravity — magic register indices. ADOPTED. 1, 6, 7, 8, 10, 11, 20, 31 are now GPR_AT, GPR_A2, GPR_A3, GPR_T0, GPR_T2, GPR_T3, GPR_S4, GPR_RA, matching the existing GPR_SP. GPR_T3 carries a doc comment naming what it is for, since it is the one register that decides whether CIC-6105 boots at all.

docs/cart.md described hle_boot as seeding "the post-IPL3 CPU/COP0/PI-DOM1
state", which no longer covers what it does or why it matters. It now spells out
both register groups: sp = 0xA4001FF0 (IPL3's stack, cited to the IPL1 listing,
whose absence caused R-18's NOP sled) and the ROM-independent IPL2 exit state
measured from a real PIF ROM boot, with t3 called out as the register CIC-6105's
self-descrambling IPL3 reads through.

It also records what is deliberately NOT seeded and why: v0, v1, a0, a1 and
t4-t9 carry IPL2's checksum of that cartridge's IPL3 and differ per ROM, so
freezing them would fabricate a computed value.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
@doublegate

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Docs-As-Spec Sync — ADOPTED. docs/cart.md described hle_boot as seeding "the post-IPL3 CPU/COP0/PI-DOM1 state", which no longer covers what it does or why it matters.

It now documents both register groups explicitly:

  • sp = 0xA400_1FF0 — IPL3's stack, cited to the IPL1 listing, whose absence caused R-18's NOP sled.
  • The ROM-independent IPL2 exit stateat, a2, a3, t0, t2, t3, s4, ra, measured from a real PIF ROM boot, with t3 called out as the register CIC-6105's self-descrambling IPL3 reads through.

And, equally importantly, what is deliberately not seeded: v0/v1/a0/a1 and t4-t9 carry IPL2's running checksum of that cartridge's IPL3 and differ per ROM, so freezing them would fabricate a value the boot computes. That exclusion is the part most likely to be "helpfully" added later by someone reading only the seed list, so the spec now says why it is empty on purpose.

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Antigravity review (Gemini via Ultra)

This PR seeds the ROM-independent IPL2 exit state during hle_boot so that CIC-6105 titles can self-descramble and boot under HLE, and updates test harness checks and accuracy documentation accordingly.

Blocking issues

None found.

Suggestions

  • crates/rustyn64-core/src/boot.rs#L141-L148: Use defined GPR constants (e.g., GPR_AT, GPR_A2, GPR_T3, GPR_RA) rather than magic integer register numbers (1, 6, 7, 8, 10, 11, 20, 31) to match surrounding style established on line 127 (GPR_SP).
  • crates/rustyn64-test-harness/tests/commercial_boot.rs#L158: roms.remove(0) unconditionally panics with an index out-of-bounds error if a staged folder contains no ROM files. Guard with if roms.is_empty() { continue; } or use roms.pop() / roms.first() to handle empty directories cleanly.

Nitpicks

  • crates/rustyn64-test-harness/tests/commercial_boot.rs#L223: Log string mentions "Conker" alongside Ocarina/Majora as a 6105 witness, but Conker's Bad Fur Day is a CIC-6102 title.

Automated first-pass review by agy on a self-hosted runner -- not a human review.

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Note for the record before merging: the one remaining failed pre-merge check (Docs-As-Spec Sync) is stale, not unaddressed.

Its stated premise is "docs/cart.md was not changed". That was true when the check ran (CodeRabbit last reviewed at 06:00:12Z); the fix landed in b4a26ff at 06:14Z and CodeRabbit has not re-run since. docs/cart.md now documents both seeded register groups, the t3/CIC-6105 rationale, and the deliberately-excluded checksum registers.

Verified on the branch rather than asserted:

$ git log --oneline -1 -- docs/cart.md
b4a26ff docs(cart): document the IPL2 exit state hle_boot seeds (R-18, R-23)
 docs/cart.md | 26 +++++++++++++++++++++++---

Merging on that basis — the finding is addressed, only the verdict predates it. Everything else is green: CI 9/9, all review threads resolved, no outside-diff findings outstanding.

@doublegate
doublegate merged commit 8bd3fdd into main Jul 29, 2026
11 checks passed
@doublegate
doublegate deleted the fix/r18-remainder branch July 29, 2026 06:25
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Correction to my earlier reply on this PR. I said Antigravity's magic-number suggestion was adopted. It was not — the change never landed.

The script that applied it hit an assertion on a later, unrelated substitution and exited before writing the file, so none of its earlier edits were saved either. A separate hand-edit fixed the exclusion table, which made the resulting diff look like the whole batch had applied. Caught by grepping main for GPR_T3 after the merge and getting 0.

Fixed in #176. No behaviour change — identical indices, and the R-23 seed test asserts the register values, which is also why nothing failed: nothing was wrong, only unclear.

Flagging it here rather than quietly landing #176, since the false "adopted" is in this thread.

doublegate added a commit that referenced this pull request Jul 29, 2026
* refactor(core): name the IPL2-exit GPR indices (missed in #175)

The named-constant change I reported as adopted on #175 never landed. The script
that applied it hit an assertion on a later, unrelated substitution and exited
before writing the file, so none of its earlier edits were saved either. A
separate edit fixed the exclusion table by hand, which made the diff look like
the whole batch had applied.

The seeds now use GPR_AT, GPR_A2, GPR_A3, GPR_T0, GPR_T2, GPR_T3, GPR_S4 and
GPR_RA alongside the existing GPR_SP. GPR_T3 carries its own doc comment naming
what it is for, since it is the register that decides whether CIC-6105 boots.

No behaviour change: the indices are identical, and the R-23 seed test asserts
the resulting register values either way.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>

* refactor(cpu): move the GPR name constants into rustyn64-cpu::regs::gpr

Review follow-up on #176. The constants were module-private to boot.rs, which
invites a second private copy elsewhere - and a second copy is how $t3 and $t4
eventually swap in one of them. They now live in rustyn64_cpu::regs::gpr, beside
the register file they index.

Naming the existing s3-s7 block through the same vocabulary exposed a real
duplicate: my S4 seed wrote r20 = 1, and the s3-s7 block three lines later wrote
r20 = 1 again as tv_type. Same register, same value, two writes, no second source
of truth. The duplicate is removed and the reason it is absent is stated, so it
does not get "helpfully" restored.

Oracle: n64-systemtest unchanged at 90 suite-wide, Phase 1 categories Failed: 0 -
measured, not assumed, though this change emits identical register writes.

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>

---------

Co-authored-by: Claude Opus 5 (1M context) <noreply@anthropic.com>
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