v0.9.1

0.9.1

Added

• Harmonics drawn as stems. Coupled Noise's spectrum view draws each harmonic as a
  line up from the axis with a dot at its amplitude, as a spectrum analyser does, instead
  of joining the harmonics into a jagged curve: a periodic waveform has nothing between
  them.

• Ringing damping per aggressor. Least ringing damping and Soft edge damping
  moved from Coupled Noise's Settings tab to each aggressor, next to its edges, so two
  switchers can be damped differently. Setups saved before keep their values: every
  aggressor takes the old solve-wide ones.

• Mesh remote sense (#93). A VRM's new Mesh sense tickbox (DC, off by default)
  takes any number of sense points, each with its own sense and optional ground sense
  pins, picked one at a time like a multi-phase VRM's phases. Every point's sense pins
  are held at the set voltage, less the load line, above that point's ground sense pins:
  the VRM's current enters at the points, and its output pins only measure.

• A 20 MHz bandwidth limit for the noise waveforms. A 20 MHz limit tickbox in the
  waveform viewer plots every view (the switch node, the currents, the ripple, the victim
  noise and its high and low states, and their spectra) as an oscilloscope with its
  20 MHz bandwidth limit on shows it: through a single pole, 3 dB down at 20 MHz. The
  titles, the results table and the notes keep the full bandwidth's figures.

• Show or hide each waveform. In Coupled Noise mode's waveform viewer, every view with
  several curves (all except the victim's, which has its own) has a tickbox for each curve
  beside the plot, in the curve's colour. Untick one to hide it, in the time plot and the
  spectrum; it stays hidden across views and solves.

• Estimate a series link's ESL (#159). Two buttons under the link's ESL:

  • From package reads the size of the part on side A from its footprint's name
    (R_0603_1608Metric, RESC2012X65N, 0805). If the name gives no size, it uses
    how far apart the part's two pads are. The ESL is 0.1 nH + 0.3 nH for each mm between
    the terminals, a line through Vishay's measured 0402 and 0603 chip resistors
    (0.4 and 0.6 nH). That gives 0.7 nH for an 0805, 1.1 nH for a 1206 and 2 nH for a
    2512. A wide-terminal part (0612) counts its short side.
  • Ferrite bead… works out a bead's inductance from its impedance at one frequency,
    read off its datasheet's curve: L = √(|Z|² − DCR²) / 2πf. The dialog asks for a point
    well below the peak, where the bead is still an inductor.

• The ripple at AC probes (#157). An aggressor can tick any of the AC setup's probes
  under Ripple at AC probes. The board model then also gives the voltage between each
  probe's rail and ground pins: the ripple at the load, through the plane and the
  capacitors near it, not only at the converter. A new Ripple at AC probes waveform
  view plots it. The results notes and the report give each probe's peak-to-peak and RMS
  ripple. A probe has to be on the aggressor's input or output rail, or on a net a series
  link joins to one, and the board model must be on.

• Drawings under the Coupled Noise tooltips (#160). Nine new drawings explain the
  fields that had text alone:

  • buck against boost, with their input voltage and output current;
  • the switching period, the duty cycle and the phases' interleaving;
  • the harmonics under the edges' envelope, cut at the highest frequency;
  • JESD8 levels and the noise margin;
  • the scan radius and the worst nets solved in full;
  • the board model: the current shared among the capacitors, the ripple at a probe, and
    the ground voltage between a victim's ends;
  • the field solves per decade and the response interpolated between them;
  • the 20 MHz limit;
  • the three coupling mechanisms, for the waveform plot's curve tickboxes and the 3D
    coupling view.

  The low-side Rds(on) and the victim's net now point at their parts of the existing
  drawings.

Fixed

• The Coupled Noise PDF report's plots fit the page. Qt's PDF layout ignores the
  report's max-width, so each waveform plot kept its own width, wider than the page, and
  its right side was cut off. In a PDF the plots are now sized to the page's width.
• A soft edge the inductor current cannot carry within the dead time is hard. At
  light load, with the valley current just below zero, the turn-on was taken as zero-
  voltage switching however small the current: 0.08 A took a buck's rising edge 30 ns
  through 200 pF, at the soft edge's damping. The controller turns the next switch on
  after its dead time, so a soft edge slower than a new Dead time (Settings, default
  20 ns) is now finished hard by that switch, at the entered edge time and the least
  ringing damping. The notes say how much of the swing the current carried.
• The hot-loop capacitors carry the switch node's ringing (#151). The ringing on the
  switch node is its capacitance trading charge with the hot loop's inductance, so the
  same ringing current, C_sw·dv/dt (about V/Z0 at its peak), now flows through a buck's
  input capacitors and a boost's output capacitors, and into the inductive coupling and
  the board model. Before, the switch node rang but the capacitor currents feeding the
  hot loop did not. On the coupled_noise example the input capacitor rings at 179 MHz,
  about ±3 A on each edge.
• A KiCad file's vias now match what the KiCad API reads (#139, from Tomachie). A via
  with no (filling) in a KiCad 9 file is unfilled, as KiCad 9 reports it; only a KiCad 10
  file leaves the fill to the design rules. A via set to remove unused layers keeps its
  pad on every layer that a connected via of its net spans, as KiCad does. On a 12-layer
  board with overlapping via pairs, the vias that differed from KiCad 10's own read went
  from 52 of 4374 to 0.
• ODB++ jobs from KiCad, Altium, OrCAD and Valor read correctly (#138, from Tomachie).
  The board step is read rather than the panel that places it (the note says what the
  panel places). Feature files compressed with Unix compress (.Z) are read, a job
  zipped inside a zip is opened, and a .tgz is read in one pass. A via's pad size is
  read on each layer, and a layer with no pad is left out. Copper with no net takes the
  net of the copper it touches, so a drawing's outline stroke is no longer dropped. An
  Altium export's copper thickness comes from the layer's copper weight when the
  thickness given is the neighbouring dielectric's. A pin exported as several pads, one of
  them with no shape, no longer stops a solve on "pad has no meshed copper". A surface's
  holes are cut in one step per island: an 18-layer job reads in 13 s instead of 200 s.

Changed

• The switch node's falling edge no longer rings like its rising edge; the rising edge
  includes reverse recovery. In a real buck the high side's turn-on is a hard edge: it
  takes the inductor current from the low side's conducting body diode and must sweep out
  its reverse-recovery charge, and the diode's snap-off rings the node. The turn-off is
  soft: the inductor current itself carries the node down into the body diode's clamp,
  which takes the ringing's energy (TI SLPA010). A boost is the other way round. Each edge
  now rings with its own damping:

  • The hard edge keeps the least ringing damping (ζ = 0.05).
  • The soft edge is damped at least Soft edge damping (Settings, default ζ = 0.5:
    one overshoot, then settled), and is no faster than C_sw·V/I.
  • A phase has a new optional Qrr, the body diode's reverse-recovery charge (default
    5 nC, 0 for a Schottky or GaN switch). It flows through the hot loop as a recovery
    current, up to Irr from Qrr = ½·Irr·(Irr/(di/dt) + t), and its snap-off rings the
    hard edge about Irr·Z0 higher.
  • A valley current below zero makes the turn-on soft too (zero-voltage switching).

  The notes say which edge is which, and the report gives each phase's Qrr. On the
  coupled_noise example the rising edge peaks at 22 V on the 12 V input, and the falling
  edge undershoots to −1.6 V instead of ringing to −8.2 V.

• The main window fits the screen; the setup file is written only by Save (#142, from
  Tomachie). The board and setup docks scroll, so the window opens above the taskbar on a
  short laptop screen, and the Log always shows a few lines. One bar above the setup pages
  holds the setup name, Import… and Save in every mode. Importing a pdn.json and
  running a DC, AC or Coupled Noise solve no longer overwrite the setup file. While there
  are unsaved changes, Save is outlined in orange, and closing the window or opening a board
  asks Save / Discard / Cancel. The mode switch, Import and Save are greyed out while a task
  runs. A pdn.json import asks before replacing a power tree, and the Log's last line says
  what it read and how that differs from the tree it replaced.

• The victim noise plot shows the superposition, with each mechanism behind a tick
  box (#154). By default the plot shows the receiver's noise from every mechanism added
  up, and the driver end's. Tick Capacitive, Inductive or Common ground to add that
  mechanism's own curve, or untick Superposition or Driver end to hide those curves.

• Coupled noise is shown with the victim held high and held low (#156). A new plot
  view, Victim held high and low, draws the receiver's line at the logic family's VOH
  with VIH below it, and at VOL with VIL above it, with the noise on each. Each state's
  title gives how far the noise goes toward that threshold and what share of the margin
  it uses. A victim has a new Driving low resistance: the open-drain type sets it to
  20 Ω, the switch's on-resistance, while the 4.7 kΩ pull-up holds the line high. Where
  the...

v0.9.0

Insane developments, high level adds:

• The biggest feature addition: SMPS COUPLED NOISE SIMULATION. Simulate coupled noise onto victim nets based on buck or boost converter operation and routing, which models four different coupling mechanisms
• Generate PDF reports.
• Model file import/export to make setting op loads easier
• refine and expand thermal solver to handle unique layer temps
• import soldermask and silkscreen for thermal modelling
• guess at component 3d models on boards that dont have them mapped (optional)
• Add keyboard shortcuts
• Add images to tooltips
• optimize via mesh generation for AC sims for vias that don't contribute to solution
• Make pypardiso an enabled dependency by default with an opt-out
• Expand flexibility of voltage tolerance entry (+/- percent, +/- voltage, abs voltage)

v0.9.0

Added

• Victim markers in the 3D view (#69). In Coupled Noise mode, PI Models marks each
  victim's driver and receiver pins in orange, named " driver" and
  " receiver" (the guessed ones where they are not set), beside AC mode's VRMs
  and capacitors (not its probes). Selecting a victim in the Victims tab highlights both ends;
  clicking either marker selects the victim.
• Coupled Noise mode, part 5: scanning, reports and a validation board (#69).
  Victims below the Solve button picks which victims a solve covers: all, one by
  name, or none (the waveforms only). Scan nearby nets looks for victims too: every
  signal net near the aggressor gets a quick estimate of its noise, and the worst are
  solved in full with default terminations (Settings: scan radius, how many, driver and
  logic level), marked "(scan)" in the results. Report writes an HTML or PDF report
  of each solve: victims against their margins, the aggressor's parasitics and
  waveforms, each victim's noise by mechanism, the scan and the notes. A new validation
  board, examples/validation/coupled_noise, has a victim beside the switch node, one
  beside the hot loop and one behind the ground plane; the tests check each is coupled the
  way its route says, their ranking, and that a scan finds them. Shared-ground coupling
  now takes only the copper's resistance between a victim's grounds: its inductive part
  is the victim's own loop picking up the field, which the inductive coupling counts.
• Coupled Noise mode, part 4: the board model and shared-ground coupling (#69). The
  converter's input and output rails and their ground are solved with AC mode's field
  model, with the switching currents as sources: they now divide among every capacitor
  on the rails through the copper's own impedance (capacitors without a model are taken
  at their board value), the rails' ripple is read at the switching device's pins, and
  the ground difference between each victim's driver and receiver gives a third coupling
  mechanism, common (shared-ground) noise. New settings turn the board model off for
  a quick solve and set its field solves per decade. AC's sweep gains the transfer
  impedance between ports with the parts on, and how a source current divides among the
  parts.
• Coupled Noise mode, part 3: inductive coupling (#69). Each input and output
  capacitor's current loop (through the switching device, or through the inductor) now
  induces a voltage along each victim's traces: the partial mutual inductance from every
  loop segment to every victim segment, with the plane under the loops mirroring their
  field as its eddy currents build up with frequency, and shielding victims on its far
  side. The EMF drives the victim's line in series, so an open receiver sees nearly all
  of it. Each victim's noise is now split into capacitive and inductive parts and their
  total: the results table names the dominant one, the plot shows each, and the log gives
  the victim's mutual inductance to each loop. A ground return with no ground copper on
  the loop's own layer now runs through the plane under it, as it does at high frequency,
  which also gives a truer hot-loop inductance.
• Coupled Noise mode, part 2: capacitive coupling onto victims (#69). A Victims
  tab names the signal nets to check, each with its driver and receiver pins (guessed as
  the net's two farthest pads), a type that fills in their terminations (CMOS push-pull,
  open drain, series or parallel terminated, a differential leg, a high-impedance analog
  input; every value editable) and its logic level, whose JESD8 levels give its noise
  margin (or enter one). A solve cuts each victim's traces into short segments and solves
  a 2D cross-section of the board's copper across each one: its capacitance, inductance
  and mutual capacitance to every switch node, from the stackup's dielectrics and solder
  mask with the planes as references (within 2 % of the microstrip and stripline
  formulas). The segments make a network of transmission lines between the driver and
  receiver, driven by the switch nodes' charge at every harmonic. A results table gives
  each victim's peak noise at its receiver against its margin, PASS or FAIL; selecting one
  plots its noise, at the receiver and driver, in time or as a spectrum. The Solver Guide
  explains the models.
• Coupled Noise mode, part 1: the aggressor's waveforms (#69). A third analysis
  mode (Noise in the toolbar, Ctrl+3) takes a buck or boost switcher as a noise
  source. Its Aggressors tab names a switching VRM, which gives the input and output
  voltages and so the topology (input above output: a buck; below: a boost), and the
  output current from the DC setup's loads (either can be entered instead). It adds the
  switching frequency and switch-node rise and fall times, and per phase the inductor
  (its value read from the board), switch node, the switching device's high- and
  low-side pins (separate parts for a discrete design), the input and output capacitors
  and, optionally, the device's Coss, on-resistances and package inductance; Fill from
  VRM finds them on the board. Its Capacitors tab is AC mode's capacitor models.
  A solve builds every waveform as an exact Fourier series: each phase's switch node,
  inductor current and pulsed current, interleaved 360°/N, each capacitor's ripple
  current (shared by their impedances) and the input and output ripple voltage. From the
  board it computes each phase's hot-loop inductance (partial inductances of the path
  from each capacitor through the device, over its ground plane by images) and the
  switch node's capacitance to ground (Coss plus its copper to the neighbouring
  planes), and from them the ringing on the switch node's edges. They are shown in
  the results and on a new Waveforms tab beside the 3D view, in time or as spectra,
  and save to .kipi-noise-results. Coupling onto signal nets comes next. The Solver
  Guide's further reading now lists the literature the mode is built on.
• Solder mask and silkscreen (#82). The stackup now has the solder mask and
  silkscreen over each outer copper layer, read from KiCad (its stackup's mask thickness
  and color), a KiCad board file or an ODB++ job (its mask and silkscreen layers). KiCad
  gives a silkscreen no thickness, so it is taken as 15 µm; a board with no stackup of its
  own gets KiCad's default, a 10 µm mask and a silkscreen on both sides. The Stackup window
  lists them above and below the copper, and their thicknesses can be changed while
  unlocked; they sit outside the board and do not change its thickness. In the
  electro-thermal solve, heat leaving the top and bottom copper for the air crosses them
  (a mask at 0.25 W/m·K over the whole face, a silkscreen at 0.2 where it prints). At
  their usual thickness they hold heat in only slightly: a 25 µm mask adds 0.1 K mm²/W
  against 100 for still air. What each silkscreen prints is read from the board: its
  drawings and text on F.SilkS and B.SilkS, off the pads and the board's edge. The
  running KiCad draws the text in its own font; from a board file KiPI draws it in a
  similar one, in the same place and turned upright as KiCad turns it; ODB++ gives it as
  strokes. The 3D view draws them, the mask in its color and open over the pads, the
  silkscreen as printed, under Mask and Silkscreen in Display, both off to start
  with. Snapshots and setups keep them; older snapshots have none.
• Drawings in tooltips (#116). Tooltips on fields that are easier to see than to read
  show a small drawing under their text, coloured to match the window (on a background a
  shade darker), with the field's part picked out: the capacitor model (C, ESL and ESR in
  series and the impedance curve each sets), the DC bias curve (voltage rating, kept at
  rating), aging and the dielectric (its code decoded, and typical temperature curves);
  the VRM types, load line, dropout and input range, DC accuracy, control loop bandwidth,
  phases and remote sense; the VRM's output, input and ground pins; a range's V, ±V or %
  unit against the nominal voltage (load tolerance, VRM input range and DC accuracy); a
  load's current split (equal or per pin group); a series link's side A and B pins, DCR
  and ESL; a probe's target (flat up to a frequency, or custom points); and the mesh's max
  edge, via grading and min edge. The drawings live in one folder, kipi/gui/graphics/,
  as SVG templates; where Qt cannot render them, the tooltip is its text alone.
• 3D views in DC PDF reports (#133). A PDF can't show the interactive 3D views, so
  they go inside it as an attached web page of their own, <report>_3d.html (Plotly and
  the views only, about 1–2 MB compressed). A bold 3D Results View link at the top of
  the report and under each net group opens it in the web browser: the link itself in
  Acrobat, Foxit and PDF-XChange (through Acrobat's JavaScript...

v0.8.0

Massive overhaul. This program can now run as both a plugin and a standalone simulator. ODB++ data can be imported to load PCBs designed in other tools into this. Many, many new features to add detail to simulations.

0.8.0 plugin and standalone modes

First milestone of running KiPI on its own, outside KiCad (#45). The plugin works as before.

Added

• The part selected in the setup, or by clicking its name in 3D, blinks red and amber
  for a few seconds before it stays amber, so it is easy to find among the PI Models marks.
  A new Snap to selected tick in the View box chooses whether picking a part in the
  setup's lists brings the 3D view to it (ticked, as before) or leaves the view where it
  is. It is available only while PI Models is ticked, applies to DC and AC mode and is
  remembered between sessions.
• PI Models marks AC mode's parts too, having marked only DC mode's: the setup's VRMs,
  series links, probes (violet) and capacitors with a model, on their pads on the nets
  shown. The probes take the DC loads' place, the loads having no part in an impedance
  sweep. The tick, the dot sizes and the names work as in DC mode, and so does picking
  (#96): a VRM, series link or probe clicked in the AC setup's lists is marked in amber and
  brought into view, and clicking its name in 3D selects it in the AC setup.
• Capacitor models have an optional Manufacturing tolerance (% of nominal), and the
  Sweep tab a Capacitor manufacturing tolerance tick that solves every model which has
  one at the low end of it: the tolerance is subtracted, so a ±10 % model keeps 90 % of its
  capacitance, the worst case for a PDN. It multiplies with the DC bias estimate, aging and
  temperature, and the Results notes and HTML report say which models were derated.
• Target calculator: Subtract DC drop at the load takes the DC drop at the selected
  load's pins off the AC voltage tolerance, from the last power-tree solve: its effective
  voltage (supply minus ground pins) against the set voltage of the VRM driving it. It needs
  a DC solve, and stays disabled, with the reason in its tooltip, until that load has a
  result. A boost (a load above the set voltage) is subtracted the same way.
• AC Probes tab: From DC load, next to Add, Duplicate and Remove, adds a probe on the
  same supply and ground nets, parts and pins as the DC load picked from its dropdown. A
  load without ground pins gets its part's pins on its ground net.
• From DC load also lists the input of every LDO and switcher, one entry per phase
  ("VR4 phase 2 input"), and adds a probe on that phase's input and ground pins (#117). The
  target calculator treats such a probe's regulator as its DC load: Copy tolerance
  takes the tighter side of the regulator's input range (in volts, or in % of its input
  rail), and Copy current and Subtract DC drop take its input current and the drop
  at its input pins from the last power-tree solve.
• Standalone mode. Started from KiCad's toolbar, KiPI runs as the plugin and reads the
  board open in the PCB editor. Started any other way (python -m kipi, or the kipi
  command of an installed package), it runs standalone: it opens board files and needs no
  KiCad.
  • python -m kipi [board] opens that board; a file KiPI cannot read stops it with a
    message.
  • The toolbar has Open… and Reload in place of Load from KiCad, Refill zones
    and Open snapshot…. Select in KiCad and the part Models box are hidden, and the
    copper uses KiPI's default layer colors.
  • Standalone opens KiPI snapshots (.kipi.json.gz), KiCad board files and ODB++ jobs
    (below). Reading HYP files comes next.
  • The title bar says (standalone), and the welcome screen and About show the mode.
  • The plugin and standalone KiPI each allow one window of their own, so an open
    standalone KiPI never takes over KiCad's KiPI button.
  • KIPI_HOST=plugin (or standalone) overrides how KiPI tells the two apart, e.g. to run
    the plugin workflow from a terminal.
• Standalone launcher (kipi_launcher.py; double-click kipi_launcher.pyw on
  Windows). The KiPI folder can be anywhere: the first start sets up an environment of
  KiPI's own (%LOCALAPPDATA%\KiPI, ~/Library/Application Support/KiPI or
  ~/.local/share/kipi), and later starts open KiPI straight away.
  • The setup window lists every package that will be installed, with its version and
    download size as PyPI gives them for this computer, and the totals to download and on
    disk. Nothing is installed until you click Install. Offline, it shows the list saved
    with the release.
  • On Windows and Linux x86-64 it offers PARDISO, with its size, pros and cons; elsewhere
    it says why not.
  • It finds a Python 3.10 to 3.13 to use (the py launcher, python3.N, or one uv
    installed) and says what is wrong with the others, such as Debian's missing
    python3-venv. It installs with uv when uv is on the PATH, else venv and pip, and with
    pip again if uv fails. Progress, the installer's output and Cancel are in the window.
  • A setup that was canceled or failed is picked up on the next start, and so is a new
    KiPI that needs different packages. The launcher keeps its own logs.
  • With no tkinter (KiCad's bundled Python has none) or --console, setup runs in the
    terminal; with neither a window nor a terminal, a message says how to start it.
  • --setup, --add-pardiso, --remove-pardiso, --repair and --reset manage the
    environment, and --create-shortcut adds KiPI to the Start menu (Windows) or the
    applications menu (Linux).
  • About → Manage dependencies… in standalone KiPI closes KiPI, opens the setup, and
    starts KiPI again afterwards.
  • python -m kipi in a Python without KiPI's packages says which are missing and to use
    the launcher, instead of a traceback.
• Solver Guide (#92, docs/solver-guide.html, served by GitHub Pages): a page
  for newcomers on what power integrity analysis is and why it matters. It covers what
  each analysis simulates, how the triangle mesh and the DC, electro-thermal and AC solvers
  work, and what DC tolerance analysis and PDN impedance mean. It also explains how heat
  raises copper resistance, how dielectric, DC bias, aging and tolerance shrink a
  capacitor's effective value, what PARDISO gains over the default solvers, and the
  problems PI simulation finds. It is linked at the top of the README, from the About
  window and from the user guide.
• About → Check for updates (#97) asks GitHub for the newest tagged release and says
  whether it is newer than the KiPI running, with a link to its release page. It only asks
  when clicked; offline (or rate-limited) it says it could not reach GitHub.
• KiCad board files without KiCad. Standalone Open… (and python -m kipi board.kicad_pcb) reads KiCad 7 to 10 .kicad_pcb files directly, giving the same board as
  the plugin reads from the running KiCad: the same stackup, copper, pad shapes and item ids,
  so a setup made in the plugin opens with the file and the other way round.
  • Every pad shape (round, rectangle, rounded and chamfered rectangle, oval, trapezoid,
    custom), KiCad 9 padstacks with their own inner and back shapes, plated pads that drop
    unconnected layers, blind and micro vias, arc tracks, copper drawings with a net, and
    footprints on either side.
  • Net classes come from the project's .kicad_pro (assigned nets and patterns).
  • Zones are read as KiCad last filled them. A zone saved unfilled has no copper, and the
    board summary's Placeholders says so; fill zones in KiCad (B) and save first.
  • When the open board file is saved (in KiCad or anywhere), KiPI offers to read it again.
  • Open… has a menu of the boards opened lately.
  • Checked against the KiCad API on real boards: identical copper, and identical DC results.
• ODB++ jobs. Standalone Open… reads ODB++ as a .zip, .tgz or .tar.gz, or an
  unpacked job (by its folder, or its matrix/matrix file).
  • Pads, traces, arcs, vias (with their spans from the drill layers) and filled planes,
    tied to nets and part pins through the job's netlist; the stackup from the layer matrix
    and each layer's attributes.
  • Pads keep their part and pin, so setups (which name parts, pins and nets) carry over;
    the setup is found by the job's name.
  • What the job does not give is listed under Placeholders: a dielectric with no
    thickness, copper drawings whose net was guessed from the copper they touch.
  • KiCad's export at its default 2 decimals rounds coordinates to 10 µm; copper thickness
    is then taken from the copper weight. KiCad's quirks are handled: bottom pads already
    mirrored, its names for pads with no number.
  • Checked against the KiCad API on a real 8-layer board exported by KiCad 10: every
    track, via and pad the same, and DC drops within 3 parts per million.
• Where the board came from, and its placeholders. The board summary in the Info box
  names the source ("From KiCad PCB editor 10.0.7") and the snapshot file it was opened from,
  and lists under Placeholders each value KiPI had to fill in because the source did not
  give it: a default stackup, a 2-layer guess from a KiCad too old to list its layers, or
  pads kept on every layer when KiCad cannot say which layers plated pads are on. Snapshots
  keep both; older snapshots read as coming from KiCad.
• Loads not connected by copper (#88). Before a DC solve, KiPI checks each load pin for a path
  to its VRM (or ground reference) through copper or series links, instead of stopping at
  the first one without. Unconnected pins draw nothing and the load's current goes through
  its other pins; a load with no supply pin, or no ...

v0.7.2

0.7.2

Added

• PI Models in the 3D view (#84): in DC mode, a new PI Models checkbox under
  Display marks the setup's VRMs (green), loads (cyan), series links (magenta) and
  capacitors with a model (white) on the copper, with a dot on each of their pads on the
  nets shown (smaller on ground) and the part's name. It starts unticked; the marks follow
  setup edits and are hidden over results. The Models checkbox is now 3D Models.
• Solver accuracy tests (#70): eight validation boards in examples/validation
  (thin and arc tracks, right-angle routes, a layer change through vias, planes, a power
  chain with a series link, and AC plane, decoupling-capacitor and ferrite boards), each
  solved and compared with hand calculations. They run in tests/accuracy, as a separate
  final CI job on pull requests into main, and open in KiPI like any snapshot.
• Click-to-sort tables everywhere (#85): the capacitor parts table, a probe's custom
  target points and a load's pin groups sort by a clicked column header, as do every table
  in the DC and AC HTML reports. Values with SI prefixes sort by value (100 nF before
  10 µF, 4u7 as 4.7 µ), references sort naturally (C9 before C10), ticked parts can be
  sorted first, and blanks go last. A table keeps its order when ticking a part refills it.
• Footprints in the capacitor parts table (#64): each capacitor's footprint shows in
  its own column (the library in its tooltip) and the filter matches it. Tick same
  footprint and Tick same value + footprint join Tick same value, so e.g. the
  0402 and 0603 100 nF parts can get their own models. Snapshots now keep each
  footprint's library name; boards saved earlier show it once read again from KiCad.
• Power tree toolbar button: a block diagram of the VRMs (each type in its own colour and
  tag), rails, series links, loads and capacitors, laid out in the direction power flows,
  saveable as a PNG. Rails with many loads or capacitor groups pack them into grids shaped
  so the whole tree fits the window (#58).
• Thermal settings: Include load power dissipation (off by default) heats the board
  with each load's power, the sum over its supply and ground pins of pin current × pin
  voltage, spread over those pins. The DC report lists each load's and DC connection's
  heat in a new Component power dissipation table (#62).
• SI prefixes in value fields (#60). A value can be typed with a prefix and unit, which
  is converted to the field's unit. For example, 10n or 10 nF in a µF field, 2 mOhm
  or 4k7 for a resistance, 1.2 MHz in a kHz field, or 3.3 V in a mV field. This
  works in every field whose unit is an SI unit (Ω, F, H, Hz, A, V, W, m). A field keeps
  its usual decimals but shows more when a small typed value needs them, so 10 pF in a µF
  field reads 0.00001 µF instead of rounding to zero. See Typing values in the help.
• Stackup window (#61). The new Stackup toolbar button opens a window listing
  every copper and dielectric layer with its thickness, each dielectric's material, εr and
  in-plane thermal conductivity, and each copper layer's resistivity. Thicknesses show in
  µm, mm, mil or oz. The stackup is locked to KiCad's values by default. Untick Lock to
  imported values to try other thicknesses, materials and εr. Each dielectric's material
  is a drop-down of the materials KiPI knows; choosing one sets its typical εr and thermal
  conductivity. Each copper layer has a conductor drop-down too (annealed, electrodeposited
  or rolled-annealed copper, silver, gold, aluminum, nickel or tin), which sets that
  layer's resistivity, TCR and thermal conductivity; the DC solve and the electro-thermal
  model use a TCR and a thermal conductivity per layer. The layers restack, and every DC and AC analysis, the 3D view and the reports use the
  edited stackup. The PI setup keeps it. KiCad's API cannot change a board's stackup yet, so
  edits stay in KiPI.
• AC Board map tab (#67). In AC mode a Board map tab beside Impedance shows the
  report's board map in the GUI: the solver's mesh of the rail and its ground (all layers,
  or one layer at a time, with or without the triangle edges), the board outline, the
  probes, and the capacitors in the model coloured by model, with those left out for want
  of a model crossed. It fills in while the rail solves, the parts first and then the mesh,
  and the Impedance tab comes to the front when the results arrive. Hover a part for its
  model. The view is fixed, fitted to the board. Saved AC results keep the map.
• Every pin's voltage and current in the DC reports (#71). The CSV export adds
  <stem>_pins.csv, and the HTML report adds a Pins section with a collapsible
  table per net group. Both list every pin each group was solved with: VRM output, phase,
  input and sense pins, load supply and ground pins, and DC connection pins. Each row has
  the pin's position, voltage, drop or boost from the set point, and current. VRM output
  pin currents are solved, so they show how the current shares between a VRM's pins. A
  load's current is split equally across its pins, which is how the solver applies it.
  Results saved before 0.7.2 have no pin list.

Changed

• HTML report file names carry the date and time of the solve
  (<board>_kipi_report_<date>_<time>.html,
  <board>_<rail>_ac_report_<date>_<time>.html), so a new solve no longer overwrites the
  last report, and Save results… suggests a time-stamped .kipi-results /
  .kipi-ac-results name (#66).
• The DC setup's Copper tab is gone. Its resistivity, TCR and per-layer resistivity
  moved to the Stackup window, since the AC solve uses them too.
• The Cut plane (axis, slider and Flip) is gone from the Display options.
• The multiphase buck example has a 10 µF input capacitor (C20-C23) on VIN beside each
  power stage, with a 10u model in its setup, so an AC solve of VIN shows decoupling.
  Its setup probes VIN at all four power stages (Q1-Q4).
• HTML reports open in the default web browser as soon as a DC or AC solve writes them
  (Python's webbrowser is the fallback where the desktop cannot open the file). Report
  still reopens them later.
• The AC HTML report's impedance plot shows |Z| only; the phase plot under it is gone.
  Hovering a curve still gives R and X.
• Flat current arrows (#63). The current-density view's arrows are flat 2D arrows
  drawn on each copper layer instead of 3D cone-and-cylinder models. They lie on the
  copper's top face and are repeated on its bottom face, so they show from above and
  below, and they are unlit, so they stay plain white at any viewing angle.
• Dielectric constant from the KiCad stackup in AC mode (#65). A dielectric made of
  several sublayers (for example, two prepreg sheets) now gets all of their εr, combined
  in series. Before, the first sublayer's εr was used for the whole thickness. The AC
  solve's log and the HTML report list the εr used for each dielectric and mark where
  Default εr stood in.
• The version number is 0.7.2. The 0.7.1 release still reported itself as 0.7.0.
• Tests are grouped into tests/core, tests/dc, tests/ac, tests/gui and
  tests/scripts, with shared test boards in tests/helpers instead of being imported from
  other test files. CI shows each folder's results in its own log group.

Fixed

• Online user guide link: when the local guide is missing, KiPI now points to the
  guide on GitHub Pages (https://drewsum.github.io/KiPI/help.html) rather than to the
  file's HTML source on GitHub.
• Clicking a results table's column header a second time now reverses the sort; it used
  to sort ascending every time, because Qt flips its own sort indicator before the click
  reaches KiPI (#85).
• The AC HTML report no longer leaves a large blank space between the board map and the
  capacitor models. The map's plot shared its id with the section heading, so Plotly drew
  the map inside the heading and left the map's own space empty. The map's height now also
  follows the page width, so a narrow window doesn't leave blank bands above and below the
  board.
• When KiPI cannot read the board's stackup, its default stackup no longer fixes εr at 4.5.
  The AC Default εr setting now applies there, as it does for any dielectric the stackup
  gives no value for.

v0.7.0

What's Changed

• Fix four solver and extraction bugs; split solve_tree into steps by @Tomachie in #39
• KiPI 0.7.0: AC impedance analysis, faster solves by @drewsum in #78

New Contributors

• @Tomachie made their first contribution in #39

Full Changelog: v0.6.5...v0.7.0

v0.6.5

Add a ton of quality of life improvements, KiCad 9 support, and a wide variety of features for complex power scenarios. Improve solver verbosity and reduce solver bottlenecks:

0.6.5 (2026-10-13): Drop and boost, limits and fixes

Added

• Drop and boost. A load can sit above its VRM's set point as well as below it: with
  remote sense, the VRM raises its output pins to hold a sense point further down the
  copper. Results now report each deviation as a drop or a boost, and the worst pin is the
  one furthest from the set point either way.
  • The load's PASS/FAIL limit is now a Tolerance (± %) rather than a maximum drop.
  • The probe, Loads table, CSV export and HTML report all say "drop" or "boost".
  • The loads CSV gives each deviation as a magnitude plus a drop/boost column, and
    adds the lowest and highest pin voltages.
• VRM output current limit. An optional limit per VRM, covering all its phases, with
  PASS/FAIL in the VRMs results tab, the CSV export and the HTML report.
• Sortable results tables. Click a column header to sort by it, and click again to
  reverse. Numbers sort by value, and each multi-phase VRM keeps its phase rows under it.
• Resistor values for DC connections. A new DC connection starts on a part that bridges
  the two nets, such as a sense resistor. When both sides are on the same resistor, its
  resistance is read from its value field, e.g. 10m, 4k7, 0R1 or 5 mΩ.
• Ticked nets are saved with the setup. The nets ticked in the Board panel are restored
  when the board is next opened. Load from KiCad on a board that is already open keeps
  the current ticks. Only a board with no saved choice starts with a guess.
• About dialog (toolbar), with the version, author, project links and the versions of
  the libraries KiPI is running on, ready to copy into a bug report.
• KiPI's own taskbar entry. On Windows, macOS and Linux, KiPI shows with its name and
  icon instead of as the Python interpreter that KiCad starts it with.
• Progress messages before long steps: meshing large planes, joining layers through
  many plated holes, mapping copper for the thermal model, and solving the board
  temperature.
• KiCad 9 support, confirmed on KiCad 9.0.7. Boards are read from KiCad 9.0.0 onwards.
  Where a KiCad 9 release lacks a request, KiPI takes the layers and their names from the
  stackup instead, and zone refills wait on a request KiCad 9 answers. Before 9.0.3, plated pads are kept on
  every layer, because KiCad cannot say which layers have their copper.
• README badges for the supported KiCad versions, platforms and Python versions.
• Install notes for macOS and Linux: plugin folders, and which Python each platform's
  KiCad runs plugins with (macOS needs a newer Python than the one KiCad bundles).

Changed

• The color scale fits the layers shown. Hiding a copper layer rescales the result
  colors to the layers left, so one layer's outlier no longer flattens the rest.
• Color bar labels sit to the left of the bar, below the title, with enough decimals to
  tell the ticks apart (a 3.3 V rail that sags 0.4 mV no longer reads "3.3" on every tick).
• Faster meshing of boards with many through-hole pads. Each layer's drill holes are
  merged once, rather than once per pad.
• The watchdog dumps thread stacks from Python rather than from faulthandler's timer, and
  logs the UI thread's stack if the window stops responding during a task.
• kicad-python 0.7.1 or later is required. 0.7.0 was only published as a source package
  that does not build.
• Net codes are read without kicad-python's deprecated Net.code, which KiCad is dropping
  from the API.

Fixed

• Refill zones could return before KiCad had finished filling, so the reads that followed
  failed with AS_BUSY or timed out. KiPI now waits until the fill has finished.
• Electro-thermal and large solves could hang or crash.
  • The faulthandler timer could kill a solve that was still running. Stack dumps now come
    from a Python thread instead.
  • Conjugate gradients could diverge at the round-off floor on large boards. It now stops
    when it stops improving and keeps its best result, and falls back to a direct solve if
    that result is not good enough.
  • Warm-started re-solves that already meet the tolerance skip CG entirely.
• Changing the via current limit froze the window for up to a minute on large boards.
  PASS/FAIL now updates in place.
• Loads on negative rails always passed. Tolerance and drop percentages now use the size
  of the set point.
• "Show copper" had no direct way back to the results. Picking the same group again,
  changing the result field, or double-clicking a via row now shows them.
• Open results… crashed when no board was loaded. It now asks for the board first.
• Clicking a pad in the results of a group that joins several nets did not identify it.
• Slotted plated holes were cut along the board's x or y axis, ignoring the pad's
  rotation, so a rotated slot could cut through copper outside its pad. Pad rotation is now
  read from KiCad and saved in snapshots. Snapshots from older versions take the slot's
  direction from the long axis of the pad's copper.
• Terminal currents in power-tree results. VRM input, phase and ground-return terminals
  reported 0 A, so per-group KCL and energy-balance checks were wrong. They now report the
  currents the solve used. No result shown in the GUI or the report was affected.
• CI runs on every branch, whatever its name, and the window tests run on Linux without an
  OpenGL context.

Development

• Tests against every KiCad API version. A fake KiCad answers the IPC API's own
  messages as each release from 9.0.0 to 10.0.6 does, and the tests extract a board from
  each one through kicad-python's real Board.
• CI covers more platforms: macOS, Python 3.10 to 3.13 on Linux, and the oldest allowed
  kicad-python. A job that does not block CI shows whether every dependency has prebuilt
  packages for Python 3.14 yet.

v0.6.0

What's Changed

• Feature/m1 extract viewer by @drewsum in #1
• Feature/m1 extract viewer by @drewsum in #2
• Feature/m2 solver by @drewsum in #3
• Feature/m3 power tree by @drewsum in #4
• Feature/m4 results by @drewsum in #5
• Feature/m5 thermal report by @drewsum in #6
• Update readme, add doc images by @drewsum in #8
• fix startup stall bug by @drewsum in #10
• Negative remote sense by @drewsum in #12
• Feature/m6 quality of life by @drewsum in #16

Full Changelog: https://github.com/drewsum/KiPI/commits/v0.6.0