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Add NEON optimizations of SynetConvolution32fNhwcGroupedBlock1x2 - #806

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ermig1979 merged 1 commit into
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cursor/neon-synet-conv32f-nhwc-grouped-add3
Aug 3, 2026
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Add NEON optimizations of SynetConvolution32fNhwcGroupedBlock1x2#806
ermig1979 merged 1 commit into
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cursor/neon-synet-conv32f-nhwc-grouped-add3

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Summary

  • Add NEON implementation of SynetConvolution32fNhwcGroupedBlock1x2 in SimdNeonSynetConvolution32fNhwcGrouped.cpp, based on the existing SSE4.1 algorithm (vectorized grouped 1x2 convolution with fused bias/activation).
  • Wire Neon dispatch in SimdNeonSynetConvolution32f.cpp and declare the class in SimdSynetConvolution32f.h.
  • Register the new source in prj/vs2022/Neon.vcxproj / filters, extend SynetConvolution32f AutoTest coverage for unaligned srcC, and document the change under release 7.2.165 in docs/2026.html.

Test plan

  • Cross-compile for aarch64 to verify the new Neon translation unit builds.
  • Native x86 Release build and smoke SynetConvolution32f AutoTest (SSE/AVX paths) including the new grouped cases.
  • On ARM hardware/CI: run ./Test "-r=.." -fi=SynetConvolution32f and confirm Neon NhwcGroupedBlock1x2 is selected for group == srcC && dstC == 2 * srcC.
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Port the SSE4.1 NhwcGroupedBlock1x2 algorithm to NEON, wire Neon dispatch,
extend AutoTest coverage for unaligned srcC, and document the change in
release 7.2.165.

Co-authored-by: Ihar Yermalayeu <ermig1979@gmail.com>
@ermig1979
ermig1979 marked this pull request as ready for review August 3, 2026 14:08
@ermig1979
ermig1979 merged commit 2376b5d into dev Aug 3, 2026
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