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Remove DF k-loop from SVE2 Gemm32fNT kernels - #829

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ermig1979 merged 1 commit into
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cursor/sve2-gemm32fnt-optimize-a185
Aug 6, 2026
Merged

Remove DF k-loop from SVE2 Gemm32fNT kernels#829
ermig1979 merged 1 commit into
devfrom
cursor/sve2-gemm32fnt-optimize-a185

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Summary

Further improves ARM SVE/SVE2 optimizations of SimdGemm32fNT in SimdSve2Gemm32fNT.cpp on top of #827/#828.

Changes

  • Remove the dual-vector DF unroll loop for (; k + DF <= K; k += DF) from all microkernels.
  • Drop DF-related dual accumulators (c00b, etc.); keep a single F-wide body loop plus a masked remainder.
  • Keep kernels macro-free (explicit NEON/AVX-512BW-style code).
  • Preserve Kernel6x4nt B-first / svmla(c, b, a) register-pressure layout from Refine SVE2 Gemm32fNT zero init and Kernel6x4nt A/B order #828.

Test plan

  • Native x86 Release: ./Test "-r=.." -fi=Gemm32fNT -tt=1 -ts=1
  • aarch64 cross-build with -DSIMD_SVE2=ON for SimdSve2Gemm32fNT.cpp
  • QEMU aarch64 (-cpu max,sve=on) Gemm32fNT AutoTest when available
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Drop the dual-vector DF unroll (for (; k + DF <= K; k += DF)) and
related dual accumulators. Keep a single F-wide body loop with a
masked remainder, matching NEON/AVX-512BW style and reducing register
pressure on SVE.

Co-authored-by: Ihar Yermalayeu <ermig1979@gmail.com>
@ermig1979
ermig1979 marked this pull request as ready for review August 6, 2026 13:39
@ermig1979
ermig1979 merged commit 7a81f27 into dev Aug 6, 2026
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2 participants