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esp-emu 0.46.0

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@mahavirj mahavirj released this 05 Oct 13:19
· 4 commits to main since this release
v0.46.0
8b20ca7
This commit was signed with the committer’s verified signature.
mahavirj Mahavir Jain
GPG key ID: 99324EF4A00734E0
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Learn about vigilant mode.

Added

  • ESP32-S31 WiFi station: firmware on ESP32-S31 now scans, connects to the built-in soft AP (WPA2-PSK and WPA3-SAE) and gets a DHCP lease, like the other WiFi chips. Previously the driver started, fell back to full PHY calibration and never saw an access point (GH #17).
  • ESP32-S31 BLE: NimBLE firmware on ESP32-S31 now runs against the built-in controller instead of stopping at its first HCI command, so BLE advertising and GATT work there as on C3/C6; ESP-IDF's network_provisioning example provisions Wi-Fi over BLE end to end (GH #17).
  • ESP32-S31 CPU lockup report: firmware that faults inside its own exception handler now resets with the CPU-lockup reset reason, and the boot ROM prints its CPU LockUp Exception Report with both exception addresses and the cause, as on silicon. Previously the chip came back from a plain software reset with nothing to report, so ESP-IDF's test_cpu_lockup_trap_chain case could not pass.
  • IO_MUX on every chip: a pin that firmware wires straight to a peripheral through the IO_MUX, bypassing the GPIO matrix, is now resolved like any other pin. This is the path the ESP-IDF SPI driver takes on a chip's default SPI pinout, where the pins were previously invisible to the emulator; on C3, C6 and H2 the IO_MUX registers were not mapped at all, so configuring a pin logged Bus fault warnings.
  • --no-panic-intercept: with --elf, the emulator stopped at the first panic even when the firmware meant to panic and reboot (a task-watchdog reset test, a deliberate abort()), so such runs never got past that point. The new flag lets the firmware's own panic handler run while keeping symbolicated output; the test harness already behaved this way.
  • Cache-error panic on ESP32-C3, P4 and S31: reading flash-mapped memory with the cache disabled now panics with Cache error, as it has on C5, C6 and H2 since 0.44.0. Before, the read quietly returned zeros. ESP-IDF's invalid access to cache raises panic case passes on all six RISC-V chips.
  • TEE interrupt delivery on ESP32-C5 and P4: an interrupt the firmware allocates for user mode is taken in user mode, and a user-mode interrupt that arrives while the TEE is running is handed to the TEE for delegation, as silicon does. ESP-IDF's TEE test app passes all four [CPU] interrupt cases on both chips, where C5 passed two and P4 one.

Fixed

  • ESP-TEE on ESP32-C5 (regression in 0.45.0): every tee_test_fw case panicked with APM - Space exception naming GDMA_AES before it did any work. On C5 silicon a TEE-mode DMA master is not refused an address outside the configured regions; the emulator was applying the C6/H2 rule there. All basic cases pass again, and the APM violation cases now fault from the REE as the suite expects.
  • ESP32-S3 boots without the ROM: with --skip-rom (and in the browser build, which takes that path) S3 firmware printed nothing at all, not even the bootloader banner, because the core started with the register window off and the bootloader's first retw trapped. It now starts as the ROM hands it over.
  • ESP32-P4 built with IDF master boots without the ROM: --skip-rom (and the browser build, which takes that path) stopped every IDF-master P4 image in the 2nd-stage bootloader with boot_comm: mismatch chip ID, expected 18, found 65535. The bootloader asks the ROM where it was loaded from, and with the ROM skipped the answer was 0; the emulator now seeds it, as it already did on C5.
  • Linux Ethernet on ESP32-S31: Linux's stmmac driver on the S31 Ethernet MAC never got a DHCP lease and reset the adapter in a loop (NETDEV WATCHDOG: transmit queue 0 timed out). Linux 6.18 now gets a lease, pings the gateway and downloads files over --net user. ESP-IDF's own Ethernet driver on S31 and P4 was unaffected.
  • Supervisor-mode interrupts on ESP32-S31: returning from a supervisor-mode trap now restores the privilege mode and interrupt level the way the S31 CLIC does, and the second core's supervisor interrupt registers are mapped, for OpenSBI and Linux guests.

Installable via:

curl -fsSL https://raw.githubusercontent.com/espressif/esp-emulator/main/install.sh | sh

Or from an existing install:

esp-emu update
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