Add HSP clock and reset generator#23
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dongxuyangeswincomputing wants to merge 5 commits intoeswincomputing:dev/test-upstream-v6.18-rc6from
Open
Add HSP clock and reset generator#23dongxuyangeswincomputing wants to merge 5 commits intoeswincomputing:dev/test-upstream-v6.18-rc6from
dongxuyangeswincomputing wants to merge 5 commits intoeswincomputing:dev/test-upstream-v6.18-rc6from
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dongxuyangeswincomputing
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Mar 4, 2026
- Add HSP clock and reset dt-bindings
- Add HSP clock and reset drivers
- Add HSP clock and reset dts
Add bindings for the high-speed peripherals clock and reset generator on the ESWIN EIC7700 HSP. Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
Add driver for the ESWIN EIC7700 high-speed peripherals system clock controller and register an auxiliary device for system reset controller which is named as "hsp-reset". Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
Add auxiliary driver to support ESWIN EIC7700 high-speed peripherals system. The reset controller is created using the auxiliary device framework and set up in the clock driver. Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
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