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7c192ee
Teach llvm-pdbutil to dump types from object files.
Dec 5, 2017
0e4bd39
[X86] Update to getSetCCResultType to be more robust to EVT types.
topperc Dec 6, 2017
b6f5a8c
Fix error in llvm-pdbutil.
Dec 6, 2017
304f979
Regex out the local hash comparison test.
Dec 6, 2017
6569ecb
[WebAssembly] Fix test breakage from r319810
dschuff Dec 6, 2017
1679b1f
Revert "[DAGCombine] Move AND nodes to multiple load leaves"
vlad902 Dec 6, 2017
f07b02f
[WebAssembly] Only emit stack pointer delcaration in BinFormatWasm as…
dschuff Dec 6, 2017
d5bd8ee
Revert r319482 and r319483 "[memcpyopt] Teach memcpyopt to optimize a…
zmodem Dec 6, 2017
4fe5c0a
[X86] Split 512-bit vector extends from types other than vXi1 out of …
topperc Dec 6, 2017
3126a95
[SCEV][NFC] Share value cache between SCEVs in GroupByComplexity
Dec 6, 2017
3371137
[[Machine]Dominators] Improved printout when verifyDomTree fails [NFC]
mikaelholmen Dec 6, 2017
54b4a2e
[X86][AVX512] Cleanup scalar move scheduler classes
RKSimon Dec 6, 2017
f8f387e
[CodeGen] Better handling of detached MachineOperands
francisvm Dec 6, 2017
1c29733
[CodeGen] Fix formatting error from r319885
francisvm Dec 6, 2017
7353836
[X86][AVX512] Tag Mask<->Vector instructions scheduler classes
RKSimon Dec 6, 2017
ce85eeb
[mips] Fix definition of 'bc' instruction
Dec 6, 2017
0c3c7c5
[SCEV][NFC] Check NoWrap flags before lexicographical comparison of S…
Dec 6, 2017
804f2f6
[X86][AVX512] Drop default NoItinerary arguments that aren't needed
RKSimon Dec 6, 2017
9a9926f
[X86] Avoid unused variable warning in Release builds. NFCI.
d0k Dec 6, 2017
23a455a
[SystemZ] Bugfix in expandRxSBG()
JonPsson Dec 6, 2017
3b06fcc
[InstSimplify] Fold insertelement into undef if index is out of bounds
igor-laevsky Dec 6, 2017
ea2f821
[X86][AVX512] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests
RKSimon Dec 6, 2017
e780c51
[cmake] Move CMAKE_(C|CXX)_COMPILER variables before CROSS_TOOLCHAIN_…
donhinton Dec 6, 2017
256a266
[ARM][AArch64][DAG] Reenable post-legalize store merge
niravhdave Dec 6, 2017
ba2a499
[X86][AVX512] Tag BROADCAST instruction scheduler classes
RKSimon Dec 6, 2017
5f22621
[Hexagon] Generate HVX code for vector construction and access
Dec 6, 2017
af12c3e
[opt-viewer] Suppress noisy Swift remarks
anemet Dec 6, 2017
30480ec
[SystemZ] Add IntrWriteMem flag to int_s390_tabort intrinsic
JonPsson Dec 6, 2017
e67db33
AMDGPU Tests: Change a case to be run with -O0
Dec 6, 2017
47a4619
[NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns bu…
Artem-B Dec 6, 2017
138b4f2
InstructionSimplify: 'extractelement' with an undef index is undef
Dec 6, 2017
a7566ef
[X86] Attempt to fix a ubsan failure in the autoupgrade of kunpck int…
topperc Dec 6, 2017
72e969f
[X86][AVX] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests
RKSimon Dec 6, 2017
47aefda
[X86][AVX512] Tag aligned/unaligned move instruction scheduler classes
RKSimon Dec 6, 2017
130d6d8
[X86] Regenerate test for r319778
topperc Dec 6, 2017
1c65bd2
[X86][AVX2] Tag MASKMOV instruction scheduler classes
RKSimon Dec 6, 2017
e5a2c5a
[cmake] Remove unnecessary header include in atomics check
smeenai Dec 6, 2017
9379849
[X86] Simplify the TTI code for getInterleavedMemoryOpCost around for…
topperc Dec 6, 2017
229aefe
[X86][AVX512] Tag scalar insert/extract instruction scheduler classes
RKSimon Dec 6, 2017
6b6659a
[X86][SSE] Regenerate vpmovm2*/vpmov*2m avx512 schedule tests
RKSimon Dec 6, 2017
ee79c38
[Target] dumpr() is defined only in debug builds.
dcci Dec 6, 2017
8b34868
Update obj2yaml and yaml2obj for .debug$H section.
Dec 6, 2017
19c4925
[LoopUtils] fix variable name to match FMF vocabulary; NFC
rotateright Dec 6, 2017
6305c5b
[COFF] Ignore semicolons in module definition identifiers
rui314 Dec 6, 2017
ec7643b
[Hexagon] Suppress warnings on unused variables defind for asserts.
timshen91 Dec 6, 2017
1a8492e
[ModRefInfo] Use createModRefInfo wrapper to create a ModRefInfo from…
alinas Dec 6, 2017
3a9eb13
[Hexagon] Suppress more warnings on unused variables defined for asse…
timshen91 Dec 6, 2017
5671e84
[X86][AVX512] Tag mask reg op instruction scheduler classes
RKSimon Dec 6, 2017
62d88c5
[LoopUtils] simplify createTargetReduction(); NFCI
rotateright Dec 6, 2017
7bcd8a1
[InlineFunction] Only replace call if there are VarArgs to forward.
fhahn Dec 6, 2017
0f7d5c2
[ModRefInfo] Do not use ModRefInfo result in if conditions as this makes
alinas Dec 6, 2017
1c6190d
[MachineCombiner] Add up latencies of all instructions in new pattern.
fhahn Dec 6, 2017
73135b4
[WebAssembly] Remove WASM_STACK_POINTER.
Dec 6, 2017
cead076
[WebAssembly] Commit a file I accidentally omitted from r319956.
Dec 6, 2017
9044c81
[PGO] Make indirect call promotion a utility
mssimpso Dec 6, 2017
2b68e11
[InstCombine] canonicalize constant-minus-boolean to select-of-constants
rotateright Dec 6, 2017
4bae528
[Hexagon] Handle perfect shuffles on single vectors
Dec 6, 2017
7ef89eb
[Hexagon] Recognize vdealb, vdealh, vshuffb and vshuffh specifically
Dec 6, 2017
d62c5bd
[LV] Interleaved access vectorization: fix computing new alias info
anemet Dec 6, 2017
f42965e
[AArch64] Add patterns to replace fsub fmul with fma fneg.
fhahn Dec 6, 2017
a11ad8a
[ModRefInfo] Use ModRefInfo wrappers in FunctionModRefBehavior
alinas Dec 6, 2017
72671d6
[CMake] Use PRIVATE when linking LLVM fuzzers.
morehouse Dec 6, 2017
edc3af3
[WebAssembly] Import the linear memory and function table.
Dec 6, 2017
dea3d88
[Coverage] Scan ahead for the most-recent completed count (PR35495)
vedantk Dec 7, 2017
113753f
[WebAssembly] Don't try to emit size information for unsized types
Dec 7, 2017
9c87911
[ModRefInfo] Replace remaining bit-wise operations with wrappers.
alinas Dec 7, 2017
01e7a56
[MC/Dwarf] Use the older DWARF linetables format on Darwin.
dcci Dec 7, 2017
9855a52
[DebugInfo] Explicitly pass a triple to this test.
dcci Dec 7, 2017
6463d11
Update BitCodeFormat.
eugenis Dec 7, 2017
9310123
[WebAssembly] section kind can be code
sbc100 Dec 7, 2017
03f3a72
Revert "[WebAssembly] Import the linear memory and function table."
sbc100 Dec 7, 2017
57c16f9
[AVR] Override ParseDirective
xiangzhai Dec 7, 2017
78cae93
Skip DBG instr in OptimizePHIs when looking for dead PHI cycles
mikaelholmen Dec 7, 2017
608221f
[SelectionDAG] Use TLI.getVectorIdxTy to determine type for an EXTRAC…
topperc Dec 7, 2017
ff09647
[SelectionDAG] In SplitVecOp_EXTRACT_VECTOR_ELT, simplify the code th…
topperc Dec 7, 2017
ab26b59
[InstSimplify] Add tests for the rL319894
igor-laevsky Dec 7, 2017
fc3c080
[X86][X87]: Adding full coverage of MC encoding for all X87 ISA Sets.…
gadihaber Dec 7, 2017
1d4832b
[X86][FMA][FMA4]: Adding full coverage of MC encoding for the FMA, FM…
gadihaber Dec 7, 2017
2bd7910
[TableGen] Give the option of tolerating duplicate register names
asb Dec 7, 2017
e65af32
[RISCV] MC layer support for the standard RV32F instruction set exten…
asb Dec 7, 2017
fd11bc0
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
francisvm Dec 7, 2017
42a0259
[RISCV] MC layer support for the standard RV32D instruction set exten…
asb Dec 7, 2017
06535b0
[RISCV] MC layer support for the standard RV64I instructions
asb Dec 7, 2017
b9b4df7
[Testing/Support] Make matchers work with Expected<T&>
labath Dec 7, 2017
94253b3
[RISCV] MC layer support for the standard RV64M instruction set exten…
asb Dec 7, 2017
29d7ea3
[RISCV] MC layer support for the standard RV64A instruction set exten…
asb Dec 7, 2017
804ebee
[RISCV] MC layer support for the standard RV64F instruction set exten…
asb Dec 7, 2017
28971c2
[RISCV] MC layer support for the standard RV64D instruction set exten…
asb Dec 7, 2017
b8b865b
[RISCV] Add missed tests for RV64D MC layer support
asb Dec 7, 2017
9fb4beb
[FuzzMutate] Allow only sized pointers for the GEP instruction
igor-laevsky Dec 7, 2017
5eb1a17
[dsymutil] Add -verify option to run DWARF verifier after linking.
JDevlieghere Dec 7, 2017
b21bd46
Add proper BTVER2 sched support for MOV instr.
avt77 Dec 7, 2017
846e43e
[Nios2] final infrastructure to provide compilation of a return from …
Dec 7, 2017
499f980
[RISCV][NFC] Use TargetRegisterClass::hasSubClassEq in storeRegToStac…
asb Dec 7, 2017
a73fa87
[RISCV] MC layer support for load/store instructions of the C (compre…
asb Dec 7, 2017
662992d
[RISCV] MC layer support for the jump/branch instructions of the RVC …
asb Dec 7, 2017
aabfb34
[X86][RDRAND] Add rdrand scheduling tests
RKSimon Dec 7, 2017
7d37185
[X86][RDSEED] Add rdseed scheduling tests
RKSimon Dec 7, 2017
959e37e
[WebAssemby] Support main functions with alternate signatures.
Dec 7, 2017
890e64f
[X86] Regenerate RDTSC codegen tests
RKSimon Dec 7, 2017
f6ae903
[X86][SSE42] SSE42 string pseudo instructions don't need scheduling info
RKSimon Dec 7, 2017
7cda6b5
[X86][X87] X87 math binop pseudo instructions don't need scheduling info
RKSimon Dec 7, 2017
1306edd
[X86] Tag RDRAND/RDSEED instruction scheduler classes
RKSimon Dec 7, 2017
e8c40f0
[CodeGen] Use more getMFIfAvailable
francisvm Dec 7, 2017
0604a72
[X86][SVM] Tag SVM instructions scheduler classes
RKSimon Dec 7, 2017
066502e
[X86][FMA] Regenerate fma schedule tests
RKSimon Dec 7, 2017
e183389
[InstCombine] Don't crash on out of bounds index in the insertelement
igor-laevsky Dec 7, 2017
c36b1d6
[DAGCombiner] eliminate shuffle of insert element
rotateright Dec 7, 2017
a3ea554
[X86] Tag LZCNT/TZCNT instructions scheduler classes
RKSimon Dec 7, 2017
989d320
[X86] Add SALC scheduling test
RKSimon Dec 7, 2017
1fdf546
[X86][VMX] Tag VMX instructions scheduler classes
RKSimon Dec 7, 2017
d0c12e6
[X86] Add LAHF/SAHF scheduling test
RKSimon Dec 7, 2017
cb541e3
[X86] Tag SALC instructions scheduler class
RKSimon Dec 7, 2017
ad6f545
[DebugInfo] Move this test to X86/ now that it specifies a triple.
dcci Dec 7, 2017
3c0dce3
[X86] Rename function in recently added test case to not be 'main' re…
topperc Dec 7, 2017
d3b8408
[CodeGen] Fix index when printing tied machine operands
francisvm Dec 7, 2017
4c084fe
[X86][TBM] Add TBM scheduling tests
RKSimon Dec 7, 2017
b58d302
[Hexagon] Generate HVX code for basic arithmetic operations
Dec 7, 2017
e94aa96
[X86] Tag BMI/BMI2/TBM instructions scheduler classes
RKSimon Dec 7, 2017
d4f9d44
[X86] Replace tabs with spaces. NFCI.
RKSimon Dec 7, 2017
1f609ed
[InstCombine] add tests for abs using bit hackery; NFC
rotateright Dec 7, 2017
69ac482
[X86] Make a couple helper lowering methods static.
topperc Dec 7, 2017
db4e07a
[X86] Fix typo in variable name. NFC
topperc Dec 7, 2017
0d51b66
[X86] Fix InsertBitToMaskVector to only issue KSHIFTS of native size …
topperc Dec 7, 2017
5e07001
[AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and GCNHaza…
searlmc1 Dec 7, 2017
71627f7
[AMDGPU] Add options for waitcnt pass debugging; add instr count in d…
searlmc1 Dec 7, 2017
82e0652
[AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add…
searlmc1 Dec 7, 2017
f534f4a
[AMDGPU] Fix typo in Kernel Descriptor for GFX6-GFX9
searlmc1 Dec 7, 2017
c297153
[MachineOutliner] Fix offset overflow check
Dec 7, 2017
134f1a8
[PGO] detect infinite loop and form MST properly
david-xl Dec 7, 2017
491343d
Temporarily revert "[PowerPC] Allow tail calls of fastcc functions fr…
echristo Dec 7, 2017
c94e896
[ModRefInfo] Make enum ModRefInfo an enum class [NFC].
alinas Dec 7, 2017
c32978d
[DebugInfo] Fix register variables not showing up in pdb.
Dec 7, 2017
8f299ae
[PowerPC][asan] Update asan to handle changed memory layouts in newer…
BillSeurer Dec 7, 2017
15f65b2
[dump] Make LLVM_ENABLE_DUMP independent, and move to llvm-config.h
donhinton Dec 7, 2017
bbb0cb1
[ORC] Mark SymbolStringPool methods as inline to avoid linkage errors…
lhames Dec 7, 2017
6de276e
[X86] Fix indentation. NFC
topperc Dec 8, 2017
b04a692
[X86] Handle alls version of vXi1 insert_vector_elt with a constant i…
topperc Dec 8, 2017
ed1cb75
Revert "[WebAssemby] Support main functions with alternate signatures."
dschuff Dec 8, 2017
94240ac
[AArch64] Avoid SIMD interleaved store instruction for Exynos.
Dec 8, 2017
db89604
[X86] Always consider inserting a vXi1 vector into the lsbs of a zero…
topperc Dec 8, 2017
2ccc420
[FuzzMutate] Correctly insert sinks and sources around invoke instruc…
igor-laevsky Dec 8, 2017
8cfd6d0
[X86][Haswell]: Updating the scheduling information for the Haswell s…
gadihaber Dec 8, 2017
f4f4ffb
[cmake] Make setting of CMAKE_C(XX)_COMPILER flags overridable for cr…
labath Dec 8, 2017
ab9bb80
[CodeGen] Move printing MO_CImmediate operands to MachineOperand::print
francisvm Dec 8, 2017
a72ab5b
[CodeGen] Move printing MO_MachineBasicBlock operands to MachineOpera…
francisvm Dec 8, 2017
99dd56e
[SCEV] Fix predicate usage in computeExitLimitFromICmp
Dec 8, 2017
8500e48
[NFC] Rename variable from Cond to Pred to make it more sound
Dec 8, 2017
94c88e3
[AMDGPU] add labels to +DumpCode output
Dec 8, 2017
c264a07
[X86][AVX512] Tag AVX512_512_SEXT_MASK_* instructions scheduler classes
RKSimon Dec 8, 2017
95462df
[PatternMatch] Add matcher for LoadInst, NFC.
alexey-bataev Dec 8, 2017
4b64a06
[X86][AVX512] Tag CLWB instruction to CLFLUSH/PREFETCH scheduler class
RKSimon Dec 8, 2017
b415523
[InstCombine] PR35354: Convert store(bitcast, load bitcast (select (C…
alexey-bataev Dec 8, 2017
705d9d2
[X86] Tag PKU/INVPCID/RDPID/SMAP/SMX/PTWRITE system instructions sche…
RKSimon Dec 8, 2017
90a51e3
[X86] Tag VIA PadLock crypto instructions scheduler classes
RKSimon Dec 8, 2017
80c5989
[X86][SHA] Tag SHA instructions scheduler classes
RKSimon Dec 8, 2017
4a34fb2
[DebugInfo] Use llc instead of llc_dwarf to fix this test.
dcci Dec 8, 2017
bed8c44
Updated llvm-objdump to display local relocations in Mach-O binaries
mdtrent Dec 8, 2017
17640ba
[X86] Tag move immediate instructions scheduler classes
RKSimon Dec 8, 2017
15884a2
[x86] use hasAVX2() rather than hasInt256(); NFC
rotateright Dec 8, 2017
e21f86e
[X86][MPX] Tag MPX instructions scheduler classes
RKSimon Dec 8, 2017
fc1d511
Reverting r320166 to fix test failures.
mdtrent Dec 8, 2017
9621d21
AMDGPU: Report Arg's Value name in metadata if kernel_arg_name metada…
kzhuravl Dec 8, 2017
573646d
[X86][MPX] Tag TSX/HLE/SGX instructions scheduler classes
RKSimon Dec 8, 2017
0f18499
[JumpThreading] Minor comment cleanup. NFC. (test commit)
bmrzycki Dec 8, 2017
45f64ad
Revert r320104: infinite loop profiling bug fix
david-xl Dec 8, 2017
91bceea
[runtimes] Add install-*-stripped targets
smeenai Dec 8, 2017
64c40f5
[cmake] Only pass CMAKE_SYSROOT if non-empty
smeenai Dec 8, 2017
90cc2f4
[llvm] Add install-distribution-stripped
smeenai Dec 8, 2017
f9958d7
AMDGPU: Preserve MMO in adjustWritemask
arsenm Dec 8, 2017
75d7256
AMDGPU: image_getlod and image_getresinfo do not read memory
arsenm Dec 8, 2017
46bfd21
AMDGPU: Set IntrReadMem on memtime intrinsics
arsenm Dec 8, 2017
238512c
[X86][X87] Tag x87 float compare instructions scheduler classes
RKSimon Dec 8, 2017
df810d2
[X86] Teach lowering to only let through (insert_subvector (vXi1 zero…
topperc Dec 8, 2017
af52d48
[X86][X87] Tag x87 load/store instructions scheduler classes
RKSimon Dec 8, 2017
79dda1d
[X86] CMOV pseudo instructions shouldn't need scheduling info as they…
RKSimon Dec 8, 2017
88dc958
AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
kzhuravl Dec 8, 2017
789bf2a
[AArch64] Add Exynos to host detection
Dec 8, 2017
2e99c3a
[WebAssemby] Re-apply r320041: "Support main functions with alternate…
Dec 8, 2017
87f92ec
[WebAssembly] Reapply r319186: "Support bitcasted function addresses …
Dec 8, 2017
976af3f
[CodeExtractor] Add debug locations for new call and branch instrs.
fhahn Dec 8, 2017
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15 changes: 10 additions & 5 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -385,18 +385,14 @@ option(LLVM_ENABLE_LLD "Use lld as C and C++ linker." OFF)
option(LLVM_ENABLE_PEDANTIC "Compile with pedantic enabled." ON)
option(LLVM_ENABLE_WERROR "Fail and stop if a warning is triggered." OFF)

option(LLVM_ENABLE_DUMP "Enable dump functions in release builds" OFF)
option(LLVM_ENABLE_DUMP "Enable dump functions even when assertions are disabled" OFF)

if( NOT uppercase_CMAKE_BUILD_TYPE STREQUAL "DEBUG" )
option(LLVM_ENABLE_ASSERTIONS "Enable assertions" OFF)
else()
option(LLVM_ENABLE_ASSERTIONS "Enable assertions" ON)
endif()

if( LLVM_ENABLE_ASSERTIONS )
set(LLVM_ENABLE_DUMP ON)
endif()

option(LLVM_ENABLE_EXPENSIVE_CHECKS "Enable expensive checks" OFF)

set(LLVM_ABI_BREAKING_CHECKS "WITH_ASSERTS" CACHE STRING
Expand Down Expand Up @@ -989,6 +985,7 @@ if(LLVM_DISTRIBUTION_COMPONENTS)

add_custom_target(distribution)
add_custom_target(install-distribution)
add_custom_target(install-distribution-stripped)
foreach(target ${LLVM_DISTRIBUTION_COMPONENTS})
if(TARGET ${target})
add_dependencies(distribution ${target})
Expand All @@ -1001,6 +998,14 @@ if(LLVM_DISTRIBUTION_COMPONENTS)
else()
message(SEND_ERROR "Specified distribution component '${target}' doesn't have an install target")
endif()

if(TARGET install-${target}-stripped)
add_dependencies(install-distribution-stripped install-${target}-stripped)
else()
message(SEND_ERROR "Specified distribution component '${target}' doesn't have an install-stripped target."
" Its installation target creation should be changed to use add_llvm_install_targets,"
" or you should manually create the 'install-${target}-stripped' target.")
endif()
endforeach()
endif()

Expand Down
2 changes: 1 addition & 1 deletion cmake/modules/AddLLVM.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -923,7 +923,7 @@ macro(add_llvm_fuzzer name)
if( LLVM_LIB_FUZZING_ENGINE )
set(LLVM_OPTIONAL_SOURCES ${ARG_DUMMY_MAIN})
add_llvm_executable(${name} ${ARG_UNPARSED_ARGUMENTS})
target_link_libraries(${name} ${LLVM_LIB_FUZZING_ENGINE})
target_link_libraries(${name} PRIVATE ${LLVM_LIB_FUZZING_ENGINE})
set_target_properties(${name} PROPERTIES FOLDER "Fuzzers")
elseif( LLVM_USE_SANITIZE_COVERAGE )
set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -fsanitize=fuzzer")
Expand Down
1 change: 0 additions & 1 deletion cmake/modules/CheckAtomic.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -81,7 +81,6 @@ endif()
## assumes C++11 <atomic> works.
CHECK_CXX_SOURCE_COMPILES("
#ifdef _MSC_VER
#include <Intrin.h> /* Workaround for PR19898. */
#include <windows.h>
#endif
int main() {
Expand Down
14 changes: 9 additions & 5 deletions cmake/modules/CrossCompile.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -7,10 +7,16 @@ function(llvm_create_cross_target_internal target_name toolchain buildtype)
endif(NOT DEFINED LLVM_${target_name}_BUILD)

if (EXISTS ${LLVM_MAIN_SRC_DIR}/cmake/platforms/${toolchain}.cmake)
set(CROSS_TOOLCHAIN_FLAGS_${target_name}
-DCMAKE_TOOLCHAIN_FILE=\"${LLVM_MAIN_SRC_DIR}/cmake/platforms/${toolchain}.cmake\"
CACHE STRING "Toolchain file for ${target_name}")
set(CROSS_TOOLCHAIN_FLAGS_INIT
-DCMAKE_TOOLCHAIN_FILE=\"${LLVM_MAIN_SRC_DIR}/cmake/platforms/${toolchain}.cmake\")
else()
set(CROSS_TOOLCHAIN_FLAGS_INIT
-DCMAKE_C_COMPILER=${CMAKE_C_COMPILER}
-DCMAKE_CXX_COMPILER=${CMAKE_CXX_COMPILER}
)
endif()
set(CROSS_TOOLCHAIN_FLAGS_${target_name} ${CROSS_TOOLCHAIN_FLAGS_INIT}
CACHE STRING "Toolchain configuration for ${target_name}")

if (buildtype)
set(build_type_flags "-DCMAKE_BUILD_TYPE=${buildtype}")
Expand All @@ -34,8 +40,6 @@ function(llvm_create_cross_target_internal target_name toolchain buildtype)
COMMAND ${CMAKE_COMMAND} -G "${CMAKE_GENERATOR}"
${CROSS_TOOLCHAIN_FLAGS_${target_name}} ${CMAKE_SOURCE_DIR}
-DLLVM_TARGET_IS_CROSSCOMPILE_HOST=TRUE
-DCMAKE_C_COMPILER=${CMAKE_C_COMPILER}
-DCMAKE_CXX_COMPILER=${CMAKE_CXX_COMPILER}
-DLLVM_TARGETS_TO_BUILD=Native
${build_type_flags} ${linker_flag} ${external_clang_dir}
WORKING_DIRECTORY ${LLVM_${target_name}_BUILD}
Expand Down
6 changes: 5 additions & 1 deletion cmake/modules/LLVMExternalProjectUtils.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -132,6 +132,10 @@ function(llvm_ExternalProject_Add name source_dir)
set(exclude EXCLUDE_FROM_ALL 1)
endif()

if(CMAKE_SYSROOT)
set(sysroot_arg -DCMAKE_SYSROOT=${CMAKE_SYSROOT})
endif()

ExternalProject_Add(${name}
DEPENDS ${ARG_DEPENDS} llvm-config
${name}-clobber
Expand All @@ -143,7 +147,7 @@ function(llvm_ExternalProject_Add name source_dir)
CMAKE_ARGS ${${nameCanon}_CMAKE_ARGS}
${compiler_args}
-DCMAKE_INSTALL_PREFIX=${CMAKE_INSTALL_PREFIX}
-DCMAKE_SYSROOT=${CMAKE_SYSROOT}
${sysroot_arg}
-DLLVM_BINARY_DIR=${PROJECT_BINARY_DIR}
-DLLVM_CONFIG_PATH=$<TARGET_FILE:llvm-config>
-DLLVM_ENABLE_WERROR=${LLVM_ENABLE_WERROR}
Expand Down
2 changes: 1 addition & 1 deletion docs/AMDGPUUsage.rst
Original file line number Diff line number Diff line change
Expand Up @@ -1549,7 +1549,7 @@ CP microcode requires the Kernel descritor to be allocated on 64 byte alignment.
must be executed with the
specified work-group size
for Z.
383:271 14 Reserved, must be 0.
383:272 14 Reserved, must be 0.
bytes
415:384 4 bytes ComputePgmRsrc1 Compute Shader (CS)
program settings used by
Expand Down
2 changes: 2 additions & 0 deletions docs/BitCodeFormat.rst
Original file line number Diff line number Diff line change
Expand Up @@ -1052,6 +1052,8 @@ The integer codes are mapped to well-known attributes as follows.
* code 50: ``inaccessiblememonly_or_argmemonly``
* code 51: ``allocsize(<EltSizeParam>[, <NumEltsParam>])``
* code 52: ``writeonly``
* code 53: ``speculatable``
* code 54: ``strictfp``

.. note::
The ``allocsize`` attribute has a special encoding for its arguments. Its two
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6 changes: 5 additions & 1 deletion docs/MIRLangRef.rst
Original file line number Diff line number Diff line change
Expand Up @@ -430,7 +430,11 @@ immediate machine operand ``-42``:

%eax = MOV32ri -42

.. TODO: Describe the CIMM (Rare) and FPIMM immediate operands.
For integers > 64bit, we use a special machine operand, ``MO_CImmediate``,
which stores the immediate in a ``ConstantInt`` using an ``APInt`` (LLVM's
arbitrary precision integers).

.. TODO: Describe the FPIMM immediate operands.

.. _register-operands:

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81 changes: 45 additions & 36 deletions include/llvm/Analysis/AliasAnalysis.h
Original file line number Diff line number Diff line change
Expand Up @@ -98,55 +98,57 @@ enum AliasResult {
/// they form a two bit matrix and bit-tests for 'mod' or 'ref'
/// work with any of the possible values.

enum ModRefInfo {
enum class ModRefInfo {
/// The access neither references nor modifies the value stored in memory.
MRI_NoModRef = 0,
NoModRef = 0,
/// The access may reference the value stored in memory.
MRI_Ref = 1,
Ref = 1,
/// The access may modify the value stored in memory.
MRI_Mod = 2,
Mod = 2,
/// The access may reference and may modify the value stored in memory.
MRI_ModRef = MRI_Ref | MRI_Mod,
ModRef = Ref | Mod,
};

LLVM_NODISCARD inline bool isNoModRef(const ModRefInfo MRI) {
return MRI == MRI_NoModRef;
return MRI == ModRefInfo::NoModRef;
}
LLVM_NODISCARD inline bool isModOrRefSet(const ModRefInfo MRI) {
return MRI & MRI_ModRef;
return static_cast<int>(MRI) & static_cast<int>(ModRefInfo::ModRef);
}
LLVM_NODISCARD inline bool isModAndRefSet(const ModRefInfo MRI) {
return (MRI & MRI_ModRef) == MRI_ModRef;
return (static_cast<int>(MRI) & static_cast<int>(ModRefInfo::ModRef)) ==
static_cast<int>(ModRefInfo::ModRef);
}
LLVM_NODISCARD inline bool isModSet(const ModRefInfo MRI) {
return MRI & MRI_Mod;
return static_cast<int>(MRI) & static_cast<int>(ModRefInfo::Mod);
}
LLVM_NODISCARD inline bool isRefSet(const ModRefInfo MRI) {
return MRI & MRI_Ref;
return static_cast<int>(MRI) & static_cast<int>(ModRefInfo::Ref);
}

LLVM_NODISCARD inline ModRefInfo setRef(const ModRefInfo MRI) {
return ModRefInfo(MRI | MRI_Ref);
}
LLVM_NODISCARD inline ModRefInfo setMod(const ModRefInfo MRI) {
return ModRefInfo(MRI | MRI_Mod);
return ModRefInfo(static_cast<int>(MRI) | static_cast<int>(ModRefInfo::Mod));
}
LLVM_NODISCARD inline ModRefInfo setRef(const ModRefInfo MRI) {
return ModRefInfo(static_cast<int>(MRI) | static_cast<int>(ModRefInfo::Ref));
}
LLVM_NODISCARD inline ModRefInfo setModAndRef(const ModRefInfo MRI) {
return ModRefInfo(MRI | MRI_ModRef);
return ModRefInfo(static_cast<int>(MRI) |
static_cast<int>(ModRefInfo::ModRef));
}
LLVM_NODISCARD inline ModRefInfo clearMod(const ModRefInfo MRI) {
return ModRefInfo(MRI & MRI_Ref);
return ModRefInfo(static_cast<int>(MRI) & static_cast<int>(ModRefInfo::Ref));
}
LLVM_NODISCARD inline ModRefInfo clearRef(const ModRefInfo MRI) {
return ModRefInfo(MRI & MRI_Mod);
return ModRefInfo(static_cast<int>(MRI) & static_cast<int>(ModRefInfo::Mod));
}
LLVM_NODISCARD inline ModRefInfo unionModRef(const ModRefInfo MRI1,
const ModRefInfo MRI2) {
return ModRefInfo(MRI1 | MRI2);
return ModRefInfo(static_cast<int>(MRI1) | static_cast<int>(MRI2));
}
LLVM_NODISCARD inline ModRefInfo intersectModRef(const ModRefInfo MRI1,
const ModRefInfo MRI2) {
return ModRefInfo(MRI1 & MRI2);
return ModRefInfo(static_cast<int>(MRI1) & static_cast<int>(MRI2));
}

/// The locations at which a function might access memory.
Expand Down Expand Up @@ -176,27 +178,31 @@ enum FunctionModRefBehavior {
/// This property corresponds to the GCC 'const' attribute.
/// This property corresponds to the LLVM IR 'readnone' attribute.
/// This property corresponds to the IntrNoMem LLVM intrinsic flag.
FMRB_DoesNotAccessMemory = FMRL_Nowhere | MRI_NoModRef,
FMRB_DoesNotAccessMemory =
FMRL_Nowhere | static_cast<int>(ModRefInfo::NoModRef),

/// The only memory references in this function (if it has any) are
/// non-volatile loads from objects pointed to by its pointer-typed
/// arguments, with arbitrary offsets.
///
/// This property corresponds to the IntrReadArgMem LLVM intrinsic flag.
FMRB_OnlyReadsArgumentPointees = FMRL_ArgumentPointees | MRI_Ref,
FMRB_OnlyReadsArgumentPointees =
FMRL_ArgumentPointees | static_cast<int>(ModRefInfo::Ref),

/// The only memory references in this function (if it has any) are
/// non-volatile loads and stores from objects pointed to by its
/// pointer-typed arguments, with arbitrary offsets.
///
/// This property corresponds to the IntrArgMemOnly LLVM intrinsic flag.
FMRB_OnlyAccessesArgumentPointees = FMRL_ArgumentPointees | MRI_ModRef,
FMRB_OnlyAccessesArgumentPointees =
FMRL_ArgumentPointees | static_cast<int>(ModRefInfo::ModRef),

/// The only memory references in this function (if it has any) are
/// references of memory that is otherwise inaccessible via LLVM IR.
///
/// This property corresponds to the LLVM IR inaccessiblememonly attribute.
FMRB_OnlyAccessesInaccessibleMem = FMRL_InaccessibleMem | MRI_ModRef,
FMRB_OnlyAccessesInaccessibleMem =
FMRL_InaccessibleMem | static_cast<int>(ModRefInfo::ModRef),

/// The function may perform non-volatile loads and stores of objects
/// pointed to by its pointer-typed arguments, with arbitrary offsets, and
Expand All @@ -206,26 +212,28 @@ enum FunctionModRefBehavior {
/// This property corresponds to the LLVM IR
/// inaccessiblemem_or_argmemonly attribute.
FMRB_OnlyAccessesInaccessibleOrArgMem = FMRL_InaccessibleMem |
FMRL_ArgumentPointees | MRI_ModRef,
FMRL_ArgumentPointees |
static_cast<int>(ModRefInfo::ModRef),

/// This function does not perform any non-local stores or volatile loads,
/// but may read from any memory location.
///
/// This property corresponds to the GCC 'pure' attribute.
/// This property corresponds to the LLVM IR 'readonly' attribute.
/// This property corresponds to the IntrReadMem LLVM intrinsic flag.
FMRB_OnlyReadsMemory = FMRL_Anywhere | MRI_Ref,
FMRB_OnlyReadsMemory = FMRL_Anywhere | static_cast<int>(ModRefInfo::Ref),

// This function does not read from memory anywhere, but may write to any
// memory location.
//
// This property corresponds to the LLVM IR 'writeonly' attribute.
// This property corresponds to the IntrWriteMem LLVM intrinsic flag.
FMRB_DoesNotReadMemory = FMRL_Anywhere | MRI_Mod,
FMRB_DoesNotReadMemory = FMRL_Anywhere | static_cast<int>(ModRefInfo::Mod),

/// This indicates that the function could not be classified into one of the
/// behaviors above.
FMRB_UnknownModRefBehavior = FMRL_Anywhere | MRI_ModRef
FMRB_UnknownModRefBehavior =
FMRL_Anywhere | static_cast<int>(ModRefInfo::ModRef)
};

// Wrapper method strips bits significant only in FunctionModRefBehavior,
Expand All @@ -234,7 +242,7 @@ enum FunctionModRefBehavior {
// entry with all bits set to 1.
LLVM_NODISCARD inline ModRefInfo
createModRefInfo(const FunctionModRefBehavior FMRB) {
return ModRefInfo(FMRB & MRI_ModRef);
return ModRefInfo(FMRB & static_cast<int>(ModRefInfo::ModRef));
}

class AAResults {
Expand Down Expand Up @@ -404,13 +412,13 @@ class AAResults {
/// Checks if functions with the specified behavior are known to only read
/// from non-volatile memory (or not access memory at all).
static bool onlyReadsMemory(FunctionModRefBehavior MRB) {
return !(MRB & MRI_Mod);
return !isModSet(createModRefInfo(MRB));
}

/// Checks if functions with the specified behavior are known to only write
/// memory (or not access memory at all).
static bool doesNotReadMemory(FunctionModRefBehavior MRB) {
return !(MRB & MRI_Ref);
return !isRefSet(createModRefInfo(MRB));
}

/// Checks if functions with the specified behavior are known to read and
Expand All @@ -424,7 +432,8 @@ class AAResults {
/// read or write from objects pointed to be their pointer-typed arguments
/// (with arbitrary offsets).
static bool doesAccessArgPointees(FunctionModRefBehavior MRB) {
return (MRB & MRI_ModRef) && (MRB & FMRL_ArgumentPointees);
return isModOrRefSet(createModRefInfo(MRB)) &&
(MRB & FMRL_ArgumentPointees);
}

/// Checks if functions with the specified behavior are known to read and
Expand All @@ -436,7 +445,7 @@ class AAResults {
/// Checks if functions with the specified behavior are known to potentially
/// read or write from memory that is inaccessible from LLVM IR.
static bool doesAccessInaccessibleMem(FunctionModRefBehavior MRB) {
return (MRB & MRI_ModRef) && (MRB & FMRL_InaccessibleMem);
return isModOrRefSet(createModRefInfo(MRB)) && (MRB & FMRL_InaccessibleMem);
}

/// Checks if functions with the specified behavior are known to read and
Expand Down Expand Up @@ -592,7 +601,7 @@ class AAResults {
case Instruction::CatchRet:
return getModRefInfo((const CatchReturnInst *)I, Loc);
default:
return MRI_NoModRef;
return ModRefInfo::NoModRef;
}
}

Expand Down Expand Up @@ -893,7 +902,7 @@ template <typename DerivedT> class AAResultBase {
}

ModRefInfo getArgModRefInfo(ImmutableCallSite CS, unsigned ArgIdx) {
return MRI_ModRef;
return ModRefInfo::ModRef;
}

FunctionModRefBehavior getModRefBehavior(ImmutableCallSite CS) {
Expand All @@ -905,11 +914,11 @@ template <typename DerivedT> class AAResultBase {
}

ModRefInfo getModRefInfo(ImmutableCallSite CS, const MemoryLocation &Loc) {
return MRI_ModRef;
return ModRefInfo::ModRef;
}

ModRefInfo getModRefInfo(ImmutableCallSite CS1, ImmutableCallSite CS2) {
return MRI_ModRef;
return ModRefInfo::ModRef;
}
};

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7 changes: 7 additions & 0 deletions include/llvm/Analysis/ConstantFolding.h
Original file line number Diff line number Diff line change
Expand Up @@ -102,6 +102,13 @@ Constant *ConstantFoldInsertValueInstruction(Constant *Agg, Constant *Val,
Constant *ConstantFoldExtractValueInstruction(Constant *Agg,
ArrayRef<unsigned> Idxs);

/// \brief Attempt to constant fold an insertelement instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
Constant *ConstantFoldInsertElementInstruction(Constant *Val,
Constant *Elt,
Constant *Idx);

/// \brief Attempt to constant fold an extractelement instruction with the
/// specified operands and indices. The constant result is returned if
/// successful; if not, null is returned.
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4 changes: 4 additions & 0 deletions include/llvm/Analysis/InstructionSimplify.h
Original file line number Diff line number Diff line change
Expand Up @@ -161,6 +161,10 @@ Value *SimplifyGEPInst(Type *SrcTy, ArrayRef<Value *> Ops,
Value *SimplifyInsertValueInst(Value *Agg, Value *Val, ArrayRef<unsigned> Idxs,
const SimplifyQuery &Q);

/// Given operands for an InsertElement, fold the result or return null.
Value *SimplifyInsertElementInst(Value *Vec, Value *Elt, Value *Idx,
const SimplifyQuery &Q);

/// Given operands for an ExtractValueInst, fold the result or return null.
Value *SimplifyExtractValueInst(Value *Agg, ArrayRef<unsigned> Idxs,
const SimplifyQuery &Q);
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6 changes: 0 additions & 6 deletions include/llvm/Analysis/MemoryDependenceAnalysis.h
Original file line number Diff line number Diff line change
Expand Up @@ -407,12 +407,6 @@ class MemoryDependenceResults {
void getNonLocalPointerDependency(Instruction *QueryInst,
SmallVectorImpl<NonLocalDepResult> &Result);

/// Perform a dependency query specifically for QueryInst's access to Loc.
/// The other comments for getNonLocalPointerDependency apply here as well.
void getNonLocalPointerDependencyFrom(Instruction *QueryInst,
const MemoryLocation &Loc, bool isLoad,
SmallVectorImpl<NonLocalDepResult> &Result);

/// Removes an instruction from the dependence analysis, updating the
/// dependence of instructions that previously depended on it.
void removeInstruction(Instruction *InstToRemove);
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