feat(igla): Wave Loop 418 — PVT regression, VCD/CSV hardening, standalone Lean integration#1356
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…ip, analog CSV voltage detection, standalone Lean integration - Add Rust regression test guarding n25q128_min_sck_half_ns_pvt >= 6 ns across the operating rectangle. - Add matching Lean 4 lemma pvt_half_ns_at_least_nominal and n25q128_min_sck_half_ns_pvt. - Harden VCD parser for multi-line $date/$version/$comment headers. - Auto-detect analog CSV voltage column by header name (voltage/v/analog). - Add standalone lake-package integration test for measured-to-lean --standalone. - Update fpga/HARDWARE_SSOT.md with first-real-capture checklist and PVT coefficient replacement recipe. - Produce W418 report, evidence, and W419 cooperation variants. Closes #1353 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Closes #1353
Wave Loop 418 (Variant C fallback) delivers:
Verification:
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