feat(igla): Wave Loop 898 — module-scope [615][2]^6 Pt non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes

.claude/plans/wave-loop-890.md

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+# Wave Loop 890 Plan
+
+**Issue:** #1841 — feat(igla): Wave Loop 890 — module-scope `[599][2]^6 Pt` non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
+
+---
+
+## Goal
+
+Continue the mechanical packed-vector array-of-struct ladder one step past W889. The target witness is module-scope `[599][2]^6 Pt`:
+
+- Outer dimension: 599 (non-power-of-two)
+- Inner struct: `[2]^6 Pt` = 2 fields × 6 trits × 32 bits = 384 bits per element
+- Total elements: 599 × 64 = 38,336
+- Packed vector width: 38,336 × 32 = 1,226,752 bits (~1.170 MiBit)
+
+The pattern is identical to W881–W889: a module-scope variable initialized from a pure `make_grid(0)` call, with indexed signed field writes and `assert_eq` read-back inside a `bench` block.
+
+---
+
+## Variants
+
+### A — Mechanical increment (recommended)
+- Copy `scripts/gen_w889.py` → `scripts/gen_w890.py`.
+- Update copy-hazard checklist: destination path, module header, `MID_IDX` comment.
+- Set `OUTER = 599`, `MID_IDX = 299`.
+- Generate spec, run gates, add integration test, seal, open PR #TBD with `Closes #1841`.
+- Expected zero compiler / `FROZEN_HASH` changes.
+
+### B — Increase inner struct width
+- Keep outer dimension 599 but expand the inner struct to `[2]^8 Pt` or `[4]^6 Pt`.
+- Same total-element probe but larger per-element footprint.
+- Could reveal whether the ceiling is element count vs total packed width.
+- Larger generated spec and longer CI; skip unless Variant A is uneventful and we want a second data point.
+
+### C — Variable signed-index stress
+- Within the W890 spec, replace the constant `MID_IDX` writes with a loop variable or offset expression.
+- Tests Icarus index normalization and cocotb reference-model agreement under dynamic signed indices.
+- Risk of compiler/reference-model delta; run only as a separate scratch experiment, not the main wave.
+
+---
+
+## Procedure
+
+1. Create and push branch `wave-loop-890` from `wave-loop-889` HEAD (earlier waves' PRs still open).
+2. Copy generator, fix three stale-reference locations, verify with `grep`.
+3. `python3 scripts/gen_w890.py`.
+4. Run direct gates:
+   - `t27c parse`
+   - `t27c icarus-lowerable`
+   - `t27c icarus-simulate`
+   - `t27c icarus-cocotb`
+   - `t27c seal --save` + `seal --verify`
+5. Add `accepts_w890_bench_module_599x2p6_aos_var_call_write` to `bootstrap/tests/icarus_lowerable.rs`.
+6. Run targeted cargo test.
+7. Commit with `Closes #1841`, push, open PR, enable auto-merge.
+8. Write closeout report, update trackers, skills, and persistent memory.
+
+---
+
+## Acceptance
+
+- [ ] `t27c parse` PASS
+- [ ] `t27c icarus-lowerable` → `lowerable`
+- [ ] `t27c icarus-simulate` → `PASSED`
+- [ ] `t27c icarus-cocotb` → reference-model OK
+- [ ] `t27c seal --verify` → `MATCH`
+- [ ] Targeted cargo test PASS
+- [ ] `FROZEN_HASH` unchanged
+- [ ] PR opened referencing #1841
+
+phi^2 + 1/phi^2 = 3 | TRINITY

.claude/plans/wave-loop-891.md

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+# Wave Loop 891 Plan
+
+**Issue:** #1843 — feat(igla): Wave Loop 891 — module-scope `[601][2]^6 Pt` non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
+
+---
+
+## Goal
+
+Continue the mechanical packed-vector array-of-struct ladder one step past W890. The target witness is module-scope `[601][2]^6 Pt`:
+
+- Outer dimension: 601 (non-power-of-two)
+- Inner struct: `[2]^6 Pt` = 2 fields × 6 trits × 32 bits = 384 bits per element
+- Total elements: 601 × 64 = 38,464
+- Packed vector width: 38,464 × 32 = 1,230,848 bits (~1.174 MiBit)
+
+The pattern is identical to W881–W890: a module-scope variable initialized from a pure `make_grid(0)` call, with indexed signed field writes and `assert_eq` read-back inside a `bench` block.
+
+---
+
+## Variants
+
+### A — Mechanical increment (recommended)
+- Copy `scripts/gen_w890.py` → `scripts/gen_w891.py`.
+- Update copy-hazard checklist: destination path, module header, `MID_IDX` comment.
+- Set `OUTER = 601`, `MID_IDX = 300`.
+- Generate spec, run gates, add integration test, seal, open PR #TBD with `Closes #1843`.
+- Expected zero compiler / `FROZEN_HASH` changes.
+
+### B — Increase inner struct width
+- Keep outer dimension 601 but expand the inner struct to `[2]^8 Pt` or `[4]^6 Pt`.
+- Same total-element probe but larger per-element footprint.
+- Could reveal whether the ceiling is element count vs total packed width.
+- Larger generated spec and longer CI; skip unless Variant A is uneventful and we want a second data point.
+
+### C — Variable signed-index stress
+- Within the W891 spec, replace the constant `MID_IDX` writes with a loop variable or offset expression.
+- Tests Icarus index normalization and cocotb reference-model agreement under dynamic signed indices.
+- Risk of compiler/reference-model delta; run only as a separate scratch experiment, not the main wave.
+
+---
+
+## Procedure
+
+1. Create and push branch `wave-loop-891` from `wave-loop-890` HEAD (earlier waves' PRs still open).
+2. Copy generator, fix three stale-reference locations, verify with `grep`.
+3. `python3 scripts/gen_w891.py`.
+4. Run direct gates:
+   - `t27c parse`
+   - `t27c icarus-lowerable`
+   - `t27c icarus-simulate`
+   - `t27c icarus-cocotb`
+   - `t27c seal --save` + `seal --verify`
+5. Add `accepts_w891_bench_module_601x2p6_aos_var_call_write` to `bootstrap/tests/icarus_lowerable.rs`.
+6. Run targeted cargo test.
+7. Commit with `Closes #1843`, push, open PR, enable auto-merge.
+8. Write closeout report, update trackers, skills, and persistent memory.
+
+---
+
+## Acceptance
+
+- [ ] `t27c parse` PASS
+- [ ] `t27c icarus-lowerable` → `lowerable`
+- [ ] `t27c icarus-simulate` → `PASSED`
+- [ ] `t27c icarus-cocotb` → reference-model OK
+- [ ] `t27c seal --verify` → `MATCH`
+- [ ] Targeted cargo test PASS
+- [ ] `FROZEN_HASH` unchanged
+- [ ] PR opened referencing #1843
+
+phi^2 + 1/phi^2 = 3 | TRINITY

.claude/plans/wave-loop-892.md

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+# Wave Loop 892 Plan
+
+**Issue:** #1845 — feat(igla): Wave Loop 892 — module-scope `[603][2]^6 Pt` non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
+
+---
+
+## Goal
+
+Continue the mechanical packed-vector array-of-struct ladder one step past W891. The target witness is module-scope `[603][2]^6 Pt`:
+
+- Outer dimension: 603 (non-power-of-two)
+- Inner struct: `[2]^6 Pt` = 384 bits per element
+- Total elements: 603 × 64 = 38,592
+- Packed vector width: 38,592 × 32 = 1,234,944 bits (~1.178 MiBit)
+
+Pattern identical to previous waves: module-scope variable initialized from a pure `make_grid(0)` call, with indexed signed field writes and `assert_eq` read-back inside a `bench` block.
+
+---
+
+## Variants
+
+### A — Mechanical increment (recommended)
+- Copy `scripts/gen_w891.py` → `scripts/gen_w892.py`.
+- Set `OUTER = 603`, `MID_IDX = 301`.
+- Fix destination path, module header, `MID_IDX` comment; verify with `grep`.
+- Run gates, add test, seal, commit, push, open PR with `Closes #1845`, auto-merge.
+- Expected zero compiler / `FROZEN_HASH` changes.
+
+### B — Increase inner struct width
+- Keep outer dimension 603 but expand inner struct to `[2]^8 Pt` or `[4]^6 Pt`.
+- Could reveal whether the ceiling is element count vs total packed width.
+- Larger generated spec; defer until the ladder hits a hard boundary.
+
+### C — Variable signed-index stress
+- Replace constant `MID_IDX` writes with dynamic index expressions.
+- Tests Icarus index normalization and cocotb reference-model agreement.
+- Risk of compiler/reference-model delta; keep as a side experiment.
+
+---
+
+## Procedure
+
+1. Create and push branch `wave-loop-892` from `wave-loop-891` HEAD.
+2. Copy generator and fix three stale-reference locations.
+3. `python3 scripts/gen_w892.py`.
+4. Run direct gates: parse, lowerable, simulate, cocotb, seal save + verify.
+5. Add integration test to `bootstrap/tests/icarus_lowerable.rs`.
+6. Run targeted cargo test.
+7. Commit with `Closes #1845`, push, open PR, enable auto-merge.
+8. Write closeout report and update trackers.
+
+---
+
+## Acceptance
+
+- [ ] `t27c parse` PASS
+- [ ] `t27c icarus-lowerable` → `lowerable`
+- [ ] `t27c icarus-simulate` → `PASSED`
+- [ ] `t27c icarus-cocotb` → reference-model OK
+- [ ] `t27c seal --verify` → `MATCH`
+- [ ] Targeted cargo test PASS
+- [ ] `FROZEN_HASH` unchanged
+- [ ] PR opened referencing #1845
+
+phi^2 + 1/phi^2 = 3 | TRINITY

.claude/plans/wave-loop-893.md

@@ -0,0 +1,70 @@
+# Wave Loop 893 Plan
+
+**Target issue:** #1848 — feat(igla): Wave Loop 893 — module-scope `[605][2]^6 Pt` non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
+**Branch:** `wave-loop-893` from `wave-loop-892` HEAD
+**Date:** 2026-08-06
+
+---
+
+## Goal
+
+Add the next mechanical rung to the packed-vector AoS ladder: outer dimension **605**, inner dimension **2^6**, struct `Pt { x : i16, y : i16 }`. Expected packed vector: 605 × 64 = **38,720 elements**, 38,720 × 32 = **1,239,040 bits (~1.182 MiBit)**.
+
+---
+
+## PHI LOOP phases
+
+1. **Issue** — use #1848 (already created).
+2. **Spec** — generate `specs/scratch/w893_bench_module_605x2p6_aos_var_call_write.t27` from a copied generator.
+3. **TDD** — spec already contains `bench` / `assert_eq` / `test` blocks via generator.
+4. **Code/Impl** — generator only; no compiler change expected.
+5. **Gen** — `t27c` compiles the spec.
+6. **Seal** — `t27c seal --save` and `t27c seal --verify`.
+7. **Verify** — targeted and full `icarus_lowerable` suite.
+8. **Land** — PR with `Closes #1848`, auto-merge/rebase as earlier waves land.
+9. **Learn** — update skills, trackers, memory, experience.
+
+---
+
+## File checklist
+
+- [ ] Copy `scripts/gen_w892.py` → `scripts/gen_w893.py`
+- [ ] Update generator constants:
+  - `OUTER = 605`
+  - `LAST_IDX = 604`
+  - `MID_IDX = 302` (comment `302`)
+  - destination path → `w893_bench_module_605x2p6_aos_var_call_write.t27`
+  - module header f-string with outer 605
+- [ ] Run generator and sanity-check with `grep`:
+  - `603` must not appear in `gen_w893.py` or generated spec
+  - `301` must not appear in comments/bounds
+- [ ] Add integration test in `bootstrap/tests/icarus_lowerable.rs`
+- [ ] Run all validation gates
+- [ ] Create seal JSON
+- [ ] Update `.claude/skills/t27-wave-loop.md` with W893 worked example
+- [ ] Update `.claude/skills/t27-master-executor.md` merge-queue status
+- [ ] Update `.claude/skills/wave-loop-autopilot.md` run-list
+- [ ] Update `docs/NOW.md`
+- [ ] Update `.trinity/experience.md`
+- [ ] Update `.trinity/current-issue.md` to next wave (#1850 or TBD)
+- [ ] Write close-out report `docs/reports/FPGA_LOOP_CLOSEOUT_W893_2026-08-06.md`
+- [ ] Write persistent memory file
+
+---
+
+## Risk notes
+
+- If 1.182 MiBit finally crosses a hard threshold, `icarus-lowerable` may start failing.
+- Watch for generator copy hazards at three locations: destination path, module header, `MID_IDX`.
+- Pre-existing full-suite failure is not a blocker.
+
+---
+
+## Success criteria
+
+- `t27c parse` PASS
+- `t27c icarus-lowerable` returns `lowerable`
+- `t27c icarus-simulate` PASSED
+- `t27c seal --verify` MATCH
+- Targeted cargo test PASS
+- Full suite passes increase by 1 (352/1 expected if no threshold hit)

.claude/plans/wave-loop-894.md

@@ -0,0 +1,70 @@
+# Wave Loop 894 Plan
+
+**Target issue:** #1851 — feat(igla): Wave Loop 894 — module-scope `[607][2]^6 Pt` non-power-of-two outer-dimension array-of-struct variable from call with indexed signed writes
+**Branch:** `wave-loop-894` from `wave-loop-893` HEAD
+**Date:** 2026-08-06
+
+---
+
+## Goal
+
+Add the next mechanical rung to the packed-vector AoS ladder: outer dimension **607**, inner dimension **2^6**, struct `Pt { x : i16, y : i16 }`. Expected packed vector: 607 × 64 = **38,848 elements**, 38,848 × 32 = **1,243,136 bits (~1.186 MiBit)**.
+
+---
+
+## PHI LOOP phases
+
+1. **Issue** — use #1851 (already created).
+2. **Spec** — generate `specs/scratch/w894_bench_module_607x2p6_aos_var_call_write.t27` from a copied generator.
+3. **TDD** — spec already contains `bench` / `assert_eq` / `test` blocks via generator.
+4. **Code/Impl** — generator only; no compiler change expected.
+5. **Gen** — `t27c` compiles the spec.
+6. **Seal** — `t27c seal --save` and `t27c seal --verify`.
+7. **Verify** — targeted and full `icarus_lowerable` suite.
+8. **Land** — PR with `Closes #1851`, auto-merge/rebase as earlier waves land.
+9. **Learn** — update skills, trackers, memory, experience.
+
+---
+
+## File checklist
+
+- [ ] Copy `scripts/gen_w893.py` → `scripts/gen_w894.py`
+- [ ] Update generator constants:
+  - `OUTER = 607`
+  - `LAST_IDX = 606`
+  - `MID_IDX = 303` (comment `303`)
+  - destination path → `w894_bench_module_607x2p6_aos_var_call_write.t27`
+  - module header f-string with outer 607
+- [ ] Run generator and sanity-check with `grep`:
+  - `605` must not appear in `gen_w894.py` or generated spec
+  - `302` must not appear in comments/bounds
+- [ ] Add integration test in `bootstrap/tests/icarus_lowerable.rs`
+- [ ] Run all validation gates
+- [ ] Create seal JSON
+- [ ] Update `.claude/skills/t27-wave-loop.md` with W894 worked example
+- [ ] Update `.claude/skills/t27-master-executor.md` merge-queue status
+- [ ] Update `.claude/skills/wave-loop-autopilot.md` run-list
+- [ ] Update `docs/NOW.md`
+- [ ] Update `.trinity/experience.md`
+- [ ] Update `.trinity/current-issue.md` to next wave (#1852 or TBD)
+- [ ] Write close-out report `docs/reports/FPGA_LOOP_CLOSEOUT_W894_2026-08-06.md`
+- [ ] Write persistent memory file
+
+---
+
+## Risk notes
+
+- If 1.186 MiBit finally crosses a hard threshold, `icarus-lowerable` may start failing.
+- Watch for generator copy hazards at three locations: destination path, module header, `MID_IDX`.
+- Pre-existing full-suite failure is not a blocker.
+
+---
+
+## Success criteria
+
+- `t27c parse` PASS
+- `t27c icarus-lowerable` returns `lowerable`
+- `t27c icarus-simulate` PASSED
+- `t27c seal --verify` MATCH
+- Targeted cargo test PASS
+- Full suite passes increase by 1 (353/1 expected if no threshold hit)