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v0.05

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@github-actions github-actions released this 28 Jul 16:33
· 73 commits to master since this release
v0.05
e8dbf16

Release of the Darm-based Debugger module for RISC OS.

Features supported:

  • *Memory
  • *MemoryI
  • *MemoryA
  • *DumpI (like *MemoryI but for files)
  • *InitStore
  • *ShowRegs (with exception region extensions)
  • *BreakSet
  • *BreakClr
  • *BreakList
  • *Debug
  • *Continue
  • SWI Debugger_Disassemble
  • SWI Debugger_DisassembleThumb

New features over 0.04:

  • *BreakSet, *BreakClr, *BreakList implemented.
  • *MemoryI annotates addresses with breakpoints.
  • *Debug and *Continue implemented.
  • Disassembly of PC-relative instructions now apply the disassembly address.
  • Tidy up of LDM/STM instructions.
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