NeSLE v0.3.0 - the scaling release

One evening after v0.2.0: the docs/gpu-scaling.md optimization program executed end to end. Every number below is measured; every abandoned direction has published measurements.

Headline (verified, clean clone, 69/69 tests + falsifiability on both platforms)

• A100-SXM4-80GB: 3,142,205 env-steps/s peak at 65,536 envs (12.6M NES frames/s, ~209,000x real-time; ~14,300x that VM's CPU) - 4.5x v0.2.0.
• GTX 1050 Ti: 180,437 env-steps/s at 4,096 envs (576x CPU) - 5.1x v0.2.0.
• Training behavior bit-exact: fixed-seed PPO losses identical to pre-sprint to 4 decimal places.

What did it

• Table-driven 6502 decode replacing the 151-case opcode switch (verified: 8M-instruction differential harness vs the old core, zero divergence; cycle-exact Klaus counts) + forced inlining of the render chain after the larger module tripped nvcc's inline heuristics.
• Lazy PPU settlement: the PPU advances only at event horizons instead of every instruction (supersedes the planned CuLE-style kernel split, which the register-resident design made obsolete).
• Hot-path hygiene: restrict-qualified SoA pointers, dead-guard removal, merged frame-position word.

What was tried and retired, with data

• Zero page in shared memory: 1.9x regression on sm_61 (occupancy collapse from 32 to 6 warps/SM) - implementation preserved on a branch, verdict in docs/gpu-scaling.md.
• Wavefront/opcode-binned dispatch: measured 3.2x SLOWER than thread-per-env on realistic instruction streams (prototype + full methodology committed under benchmarks/wavefront_prototype/) - hardware SIMT reconvergence over the table-driven core already shares dispatch work; explicit binning serializes it.

docs/gpu-scaling.md is now a complete ledger: every tier shipped or closed with measurements.

Requirements: CUDA GPU (CTK 12.x for Pascal), Python >= 3.10, user-supplied SMB ROM (never distributed).