Releases: hdl-tools/analog-chip-design-agents
Releases · hdl-tools/analog-chip-design-agents
Release list
v1.1.0
What's Changed
- Add memory system documentation by @chuanseng-ng in #19
- Centralize agent memory in a machine-level root with repo seed by @chuanseng-ng in #20
Full Changelog: v1.0.3...v1.1.0
v1.0.3
What's Changed
- feat: auto-detect AI agents and install natively to all five platforms by @chuanseng-ng in #16
- Reorganize docs: move installation, architecture, and roadmap to docs/ by @chuanseng-ng in #17
- Add predictive/academic PDK tier (freepdk45, asap7) by @chuanseng-ng in #18
Full Changelog: v1.0.2...v1.0.3
v1.0.2
What's Changed
- Migrate npm publish to OIDC trusted publishing by @chuanseng-ng in #15
Full Changelog: v1.0.1...v1.0.2
v1.0.1
What's Changed
- docs: consolidate completion status and streamline future work by @chuanseng-ng in #13
- Add npm installer and publish workflow for Claude Code plugins by @chuanseng-ng in #14
Full Changelog: v1.0.0...v1.0.1
v1.0.0
What's Changed
- Add roadmap for analog/mixed-signal + RF design agents marketplace by @chuanseng-ng in #1
- Phase 0: scaffold analog/mixed-signal + RF marketplace skeleton by @chuanseng-ng in #2
- Phase 1: implement core analog spine (circuit, simulation, infrastructure, meta) by @chuanseng-ng in #3
- [Template] Add pull request, bug report and feature request ticket templates by @chuanseng-ng in #4
- Phase 2: architecture, modeling & AMS verification plugins by @chuanseng-ng in #5
- Resolve CodeRabbit findings from PR #5 by @chuanseng-ng in #6
- Phase 3: physical-design tier (layout, PV, extraction, post-layout) by @chuanseng-ng in #7
- Phase 4: implement reliability & characterization sign-off-depth plugins by @chuanseng-ng in #8
- Phase 5: implement rf-design & em-modeling RF-emphasis plugins by @chuanseng-ng in #9
- Phase 6: integration & polish — complete ams-integration + distribution/tooling by @chuanseng-ng in #10
- Phase 7: Wire RF/EM into cross-domain fix_request loop by @chuanseng-ng in #11
- Add schema validation, end-to-end harness, and test suite by @chuanseng-ng in #12
Full Changelog: https://github.com/chuanseng-ng/analog-chip-design-agents/commits/v1.0.0