fix: make PLL2M dynamic to keep VCO=800MHz for any HSE frequency (closes #11594)#11603
Merged
sensei-hacker merged 14 commits intoMay 30, 2026
Merged
Conversation
PLL2M was hardcoded to 5, which assumes HSE = 8 MHz. On KAKUTEH7WING (HSE = 16 MHz) this gives VCO = 16/5 * 500 = 1600 MHz (out of spec) and SDMMC clock = 400 MHz instead of the required 200 MHz. Fix: compute PLL2M as HSE_VALUE / 1600000, pinning the VCO input to exactly 1.6 MHz for any HSE frequency. With N=500 this gives VCO=800 MHz: HSE=8 MHz: M=5, N=500 → VCO=800 MHz (identical to original) HSE=16 MHz: M=10, N=500 → VCO=800 MHz (correct for KAKUTEH7WING) PLL2R/4 = 200 MHz (SDMMC), PLL2P/2 = 400 MHz. VCIRANGE_0 (1–2 MHz) is correct for the 1.6 MHz VCI input on all targets. Also adds STATIC_ASSERT to catch future targets with non-multiple HSE, and corrects the PLL2P comment (was "500Mhz", should be "400Mhz"). Fixes iNavFlight#11594
If PLL2 fails to lock at startup the SDMMC clock is dead and the SD card will fail silently. Call Error_Handler() (infinite loop) on failure to make the fault visible rather than continuing into undefined behaviour.
PLL1 VCI input is HSE/M = 2 MHz on all H7 targets, which falls in the 2-4 MHz range (VCIRANGE_1). The previous VCIRANGE_2 (4-8 MHz) was incorrect and affected PLL charge pump calibration. Fixes iNavFlight#11602
Remove redundant prose that duplicated the assert, remove board-specific name from shared init code, and shorten the assert slug to match codebase conventions.
Contributor
Qodo reviews are paused for this user.Troubleshooting steps vary by plan Learn more → On a Teams plan? Using GitHub Enterprise Server, GitLab Self-Managed, or Bitbucket Data Center? |
|
Test firmware build ready — commit Download firmware for PR #11603 237 targets built. Find your board's
|
PLL2M was hardcoded to 5, which assumes HSE = 8 MHz. On KAKUTEH7WING (HSE = 16 MHz) this gives VCO = 16/5 * 500 = 1600 MHz (out of spec) and SDMMC clock = 400 MHz instead of the required 200 MHz. Fix: compute PLL2M as HSE_VALUE / 1600000, pinning the VCO input to exactly 1.6 MHz for any HSE frequency. With N=500 this gives VCO=800 MHz: HSE=8 MHz: M=5, N=500 → VCO=800 MHz (identical to original) HSE=16 MHz: M=10, N=500 → VCO=800 MHz (correct for KAKUTEH7WING) PLL2R/4 = 200 MHz (SDMMC), PLL2P/2 = 400 MHz. VCIRANGE_0 (1–2 MHz) is correct for the 1.6 MHz VCI input on all targets. Also adds STATIC_ASSERT to catch future targets with non-multiple HSE, and corrects the PLL2P comment (was "500Mhz", should be "400Mhz"). Fixes iNavFlight#11594
If PLL2 fails to lock at startup the SDMMC clock is dead and the SD card will fail silently. Call Error_Handler() (infinite loop) on failure to make the fault visible rather than continuing into undefined behaviour.
PLL1 VCI input is HSE/M = 2 MHz on all H7 targets, which falls in the 2-4 MHz range (VCIRANGE_1). The previous VCIRANGE_2 (4-8 MHz) was incorrect and affected PLL charge pump calibration. Fixes iNavFlight#11602
Remove redundant prose that duplicated the assert, remove board-specific name from shared init code, and shorten the assert slug to match codebase conventions.
…SP changes not in scope)" This reverts commit 92cf6ab.
…rning" This reverts commit 3b393c5.
…' into fix/11594-pll2-dynamic-m-divider
Contributor
Qodo reviews are paused for this user.Troubleshooting steps vary by plan Learn more → On a Teams plan? Using GitHub Enterprise Server, GitLab Self-Managed, or Bitbucket Data Center? |
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
Fixes #11594. On KAKUTEH7WING (16 MHz HSE), PLL2M was hardcoded to 5, giving VCO = 16/5 × 500 = 1600 MHz (out of spec) and SDMMC clock = 400 MHz instead of the required 200 MHz.
Fix: compute
PLL2M = HSE_VALUE / 1600000, pinning VCI to exactly 1.6 MHz:Also adds a
STATIC_ASSERTto catch future targets with incompatible HSE frequencies, and checks theHAL_RCCEx_PeriphCLKConfigreturn value so a PLL2 lock failure halts rather than continuing silently.Bonus fix: corrects a pre-existing PLL1 VCIRANGE mismatch (was VCIRANGE_2 / 4–8 MHz; VCI input is 2 MHz so correct range is VCIRANGE_1 / 2–4 MHz). Fixes #11602.
Changes
src/main/target/system_stm32h7xx.c— dynamic PLL2M, STATIC_ASSERT, Error_Handler on failure, PLL1 VCIRANGE_1src/main/fc/fc_msp.c— fix sign-compare warning (unrelated build fix)Test plan