v2024.3.0

Changes In This Release

• SDK Enhancements:
  • LLVM (clang) compiler rebased on upstream version 19.1.0.
  • LLVM auto-vectorization optimised to take account of APXM6200 vector scheduling model.
  • Bare-metal start-up code in rvinit updated to account for latest APXM6200 register settings (in particular, enable data prefetch).
  • OpenOCD configuration changes to work with debug module in the latest APXM6200 FPGA.
  • QEMU rebased on upstream version 9.1 (Linux hosts).
  • QEMU: improved modelling of APXM6200 machine, including AIA (Advanced Interrupt Architecture).
  • Documented how to work around problems with hitting maximum file path length in Windows.
  • Location of the examples has changed in Windows. They are now under a source folder in the user's home area rather than under My Documents. This can help to avoid unwanted backup of build artifacts.
  • Updates to RTXM2200 and APXM6200 CPU models.
  • Documented how to use the Catapult Studio extension with the remote connection feature in VSCode, in order to perform development and debugging operations on a machine remote from the one on which VSCode is running.
  • Updated SVD file with latest APXM6200 peripherals, so these peripherals can be viewed and manipulated in the peripheral registers window, and referenced in the header file for the platform.
• SDK Bug Fixes:
  • On RPM-based linux host systems such as Redhat, the gdb executable in the SDK had a dependency on a python library libpython3.9.so.1.0, and so raised an error if this library was not present on the system. This library is now bundled with the SDK, so this error will not arise.
• Catapult Studio Enhancements:
  • New features in memory window and peripheral registers window to deal with special memory types (particularly pertinent in dealing correctly with 16550-compatible UART peripherals):
    • Memory locations (e.g. registers) that have an associated read action (such as popping from a FIFO) are not read by default but only when explictly selected for update.
    • Write-only memory locations are not read.
    • Registers may be marked (in the SVD file) as having a conditional existance. This allows multiple registers to be defined at an address, with the current existant register being dependent on a control bit in another register.
    • Read-only registers are marked as such.
  • Can now set watchpoints (data breakpoints) on elements of an array.
• Catapult Studio bug fixes:
  • Fixed some instances where addresses were represented with floating-point values, which could potentially result in inaccuracy, particularly on 64-bit systems.
  • Fixed a bug where bitfields in the peripheral registers window displayed a corrupted value for 64-bit registers

Versions of Key 3rd-Party Components

SDK component	Version
Clang	19.1.0
FreeRTOS Kernel	10.5.1
GNU Binutils	2.42
GNU GCC	14.1.0
GNU GDB	13.2
GNU SIM	13.2
Ldgen	1
OpenOCD	0.12.0
PyElfTools	0.27
Qemu	9.1.0
Whisper	1.608