Element, subset, and swizzle collapsing in generated SV

[mkorbel1]

Description & Motivation

This PR dramatically improves SV generation by reducing the amount of unnecessary assignments, net_connects, swizzles, subsets, and intermediate signals for Logics and LogicArrays (both net and non-net) in generated SystemVerilog. This makes the SV much more readable, debuggable, and tool friendly.

Related Issue(s)

N/A

Testing

Added extensive new testing for collapsing capabilities, existing suite helps protect.

Backwards-compatibility

Is this a breaking change that will not be backwards-compatible? If yes, how so?

No

Documentation

Does the change require any updates to documentation? If so, where? Are they included?

No

[desmonddak]

I think it makes sense to commit this PR for cleaning up the major cases. Two main arch points to prepare for is the naming problem, which we tried to solve in central_naming by marking first in the synth base classes, and then another is to think about what will be common optimizations versus SV specific.

Unfortunately a netlist branch is not yet in and that has a really general approach to deal with nested assignments and series of pack/unpack/pack as well as subset/concat/subset which can occur in a nested fashion (a very wide interface split into subsets and then recombined in a couple levels possibly with some splits and recombines and finally end up at the very same interface. Then mixed array and struct assignments, reversals, etc. all get very tricky, especially with partial assignments and subset assignments. Worth thinking about a general optimization approach along with the naming issue. Nested Interface assignments containing busses is the source of these.

[mkorbel1]

Thank you for the great feedback @desmonddak ! I think it's all addressed now so I'll merge once CI passes again.

I agree there's room for improvement in terms of generality and applicability to future synth stacks, so we should keep that in mind as we merge more things in. But at least this is a big improvement for now and has good regression tests to help protect future architectural reuse and improvements.