v0.1.15

Universal CPU temperature mapping

Per-core CPU temperatures now work on all Apple Silicon chips — M1 through M5, including Pro, Max, and Ultra variants. The previous hardcoded key matching (Tex*/Tp1*/Tp2*) is replaced with a universal bank-based algorithm that automatically detects die layout and sensor grouping.

What's new:

• docs: Mention installation with pixi by @pavelzw in #7
• Universal sensor mapping — SMC temperature keys are parsed using the T{type}{bank}{suffix} encoding rule with base-62 suffix alphabet. Bank character encodes die * 5 + cluster_offset, supporting single-die chips (M1–M5 Pro/Max) and dual-die Ultra chips automatically.
• M3 Ultra dual-die support — E-core temps from Te0/Te5 banks, P-core temps from Tp1+Tp2 / Tp6+Tp7 banks. Direct bank selection instead of fragile exact-count matching.
• M5 Max primary bank support — chips with no Te* keys (all temps in Tp0) are handled via primary bank fallback with automatic E/P split.
• Stale value caching — when an SMC sensor temporarily reads 0 or fails, the last known good value is shown with a ~ prefix (e.g. ~37°C). Eliminates temperature flickering on M3 Ultra and similar chips where sensors intermittently return invalid readings.
• Partial results — if some sensors are unavailable, remaining cores still show temperatures instead of the entire die going blank.

Other changes

• README legend — all UI symbols explained (≈, ≤, ~, ▸, power colors, pending…, [dead])
• Contributing section — pre-commit checklist and diagnostic collection instructions
• pixi installation — documented as an alternative package manager (#7, thanks @pavelzw)

Test coverage

11 unit tests for temperature mapping: single-die, dual-die Ultra, M5 Max primary bank, partial sensor loss, stale flag propagation, legacy fallback, placeholder detection, base-62 continuity.

New Contributors

• @pavelzw made their first contribution in #7

Full Changelog: v0.1.14...v0.1.15