lantern-hal

The Hardware Abstraction Layer: the thin seam that confines all ISA- and platform-specific code so the rest of LanternOS stays portable. The HAL is what makes the x86-64 (development) → RISC-V (target) journey credible (ADR-0002).

• Layer: TCB-adjacent machine layer (a minimal subset is in the TCB).
• Language: Rust, no_std, with the bulk of the system's justified unsafe (MMIO, page tables, trap entry) isolated here.
• System context: wiki/Hardware, wiki/Kernel.

⚠️ Phase 0. Design only; no code. See STATUS.md.

In this repo

• ARCHITECTURE.md — the abstraction contract.
• THREAT_MODEL.md.
• STATUS.md.

The rule

The portable kernel core contains no target_arch logic beyond calling the HAL. If per-ISA code is leaking upward, that is a HAL design failure.