cuda: quantize_rowwise_i8_convrot_cuda in registers + template scaling - #1
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dfriehs wants to merge 1 commit into
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cuda: quantize_rowwise_i8_convrot_cuda in registers + template scaling#1dfriehs wants to merge 1 commit into
dfriehs wants to merge 1 commit into
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Overview
Rewrite of
quantize_rowwise_i8_convrot_cudato work without the large shared memory required to store intermediates, instead does all of the H256 rotation via warp shuffles. This was quite a bit better than the previous kernel in Nsight Compute for me, but I don't expect much of an end-to-end speed up unless on cards with very little shared memory that weren't able to use the rowwise kernel before.I tested and profiled Krea2 shapes (k=6144/16384, rows=1042/4114) on a RTX 3090, and also built stable-diffusion.cpp with the changes applied and generated a test image.
If you would rather wait with this PR and have me bring it up on mainline after yours is merged just tell me, that's fine by me.
Additional information
Are there any models to test that require even higher
k? The kernel scales via templating to even higher row sizes at the cost of more registers per thread, but I only special cased for up tok=32768. With biggerkyou might see more of an improvement as 32768 should have already been over the shared memory limit for a lot of consumer GPUs on the old kernel.The
scales == nullptrspecial case to store scales after each row looked like dead code so I removed it and asserted instead, all callers seem to pass scales right now. I'm not sure about the asserts for alignment, but the kernel requires that alignment for coalesced 128-bit loads.Requirements