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10 changes: 5 additions & 5 deletions packages/mesa/0003-fix-for-anon-file.patch
Original file line number Diff line number Diff line change
Expand Up @@ -2,12 +2,12 @@ Fallback to `@TERMUX_PREFIX@/tmp` if env `XDG_RUNTIME_DIR` is not set.

--- a/src/util/anon_file.c
+++ b/src/util/anon_file.c
@@ -122,7 +122,7 @@ get_or_create_user_temp_dir(char* buf, size_t len) {
@@ -125,7 +125,7 @@ get_or_create_user_temp_dir(void) {
return buf;
}

- snprintf(buf, len, "/tmp/xdg-runtime-mesa-%ld", (long)getuid());
+ snprintf(buf, len, "@TERMUX_PREFIX@/tmp/xdg-runtime-mesa-%ld", (long)getuid());
- n = asprintf(&buf, "/tmp/xdg-runtime-mesa-%ld", (long)getuid());
+ n = asprintf(&buf, "@TERMUX_PREFIX@/tmp/xdg-runtime-mesa-%ld", (long)getuid());
if (n < 0)
return NULL;
mesa_logd("%s: XDG_RUNTIME_DIR not set; falling back to temp dir %s",
__func__, buf);
if (stat(buf, &st) == 0) {
24 changes: 0 additions & 24 deletions packages/mesa/0019-UBWC_5-and-UBWC_6-support.patch

This file was deleted.

85 changes: 0 additions & 85 deletions packages/mesa/0020-unofficial-support-adreno-830.patch

This file was deleted.

168 changes: 0 additions & 168 deletions packages/mesa/0021-unofficial-support-adreno-810-825-829.patch

This file was deleted.

68 changes: 68 additions & 0 deletions packages/mesa/0021-unofficial-support-adreno-810-825.patch
Original file line number Diff line number Diff line change
@@ -0,0 +1,68 @@
freedreno: enable Adreno 810+825

The source code is from whitebelyash:
https://github.com/whitebelyash/mesa-tu8/commit/e010ccc559f680b89a0867ab34025fcf0a438b82

diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py
index ee9bcf86437..0d80ed282d4 100644
--- a/src/freedreno/common/freedreno_devices.py
+++ b/src/freedreno/common/freedreno_devices.py
@@ -1450,5 +1450,58 @@ add_gpus([
raw_magic_regs = a8xx_base_raw_magic_regs,
))

+# gen8_3_0
+add_gpus([
+ GPUId(chip_id=0x44010000, name="Adreno (TM) 810"),
+ ], A6xxGPUInfo(
+ CHIP.A8XX,
+ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_gen2, GPUProps(
+ gmem_vpc_attr_buf_size = 16384,
+ gmem_vpc_pos_buf_size = 12288,
+ gmem_vpc_bv_pos_buf_size = 20480,
+ # Don't show "raytracing disabled"
+ has_ray_intersection = False,
+ has_sw_fuse = False,
+ )],
+ num_ccu = 1, # I'm not sure about this
+ num_slices = 1,
+ tile_align_w = 32,
+ tile_align_h = 16,
+ tile_max_w = 16384,
+ tile_max_h = 16384,
+ num_vsc_pipes = 32,
+ cs_shared_mem_size = 32 * 1024,
+ wave_granularity = 2,
+ fibers_per_sp = 128 * 2 * 16,
+ magic_regs = dict(),
+ raw_magic_regs = a8xx_base_raw_magic_regs,
+ ))
+
+# gen8_6_0
+add_gpus([
+ GPUId(chip_id=0x44030000, name="Adreno (TM) 825"),
+ ], A6xxGPUInfo(
+ CHIP.A8XX,
+ [a7xx_base, a7xx_gen3, a8xx_base, a8xx_gen1, GPUProps(
+ # This is probably not an optimal config for gmem/sysmem, but it was working before and I don't have any a825 device to test (neither I have any trace info)
+ sysmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value,
+ sysmem_per_ccu_color_cache_size = 128 * 1024,
+ sysmem_ccu_depth_cache_fraction = CCUColorCacheFraction.THREE_QUARTER.value,
+ sysmem_per_ccu_depth_cache_size = 96 * 1024,
+ )],
+ num_ccu = 4,
+ num_slices = 2,
+ tile_align_w = 96,
+ tile_align_h = 32,
+ tile_max_w = 16416,
+ tile_max_h = 16384,
+ num_vsc_pipes = 32,
+ cs_shared_mem_size = 32 * 1024,
+ wave_granularity = 2,
+ fibers_per_sp = 128 * 2 * 16,
+ magic_regs = dict(),
+ raw_magic_regs = a8xx_base_raw_magic_regs,
+ ))
+
if __name__ == "__main__":
main()
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