[transform] Target-aware register reduction dim tiling strategy - #275
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Adds register-level reduction strategy that derives tile sizes based on operations and target. A separate register-level strategy that focuses on reduction dims. As previously, the current implementation mimics existings pipeline descriptors and is another step toward reshaping operations into register-friendly sizes. Assisted-by: Claude
rengolin
approved these changes
Sep 4, 2026
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Adds register-level reduction strategy that derives tile sizes based on operations and target.
A separate register-level strategy that focuses on reduction dims. As previously, the current implementation mimics existings pipeline descriptors and is another step toward reshaping operations into register-friendly sizes.
Assisted-by: Claude