[RISCV] Remove remapping Zfinx register classes to GPR class in getRegForInlineAsmConstraint. #164352
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…gForInlineAsmConstraint. The codegen for Zfinx has been supported. So we don't need to remap Zfinx register classes to GPR class.
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@llvm/pr-subscribers-backend-risc-v Author: Jim Lin (tclin914) ChangesThe codegen for Zfinx has been supported. So we don't need to remap Zfinx register classes to GPR class. Full diff: https://github.com/llvm/llvm-project/pull/164352.diff 1 Files Affected:
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 169465e18f103..adc50871bdf9c 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -24047,18 +24047,7 @@ RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
}
}
- std::pair<Register, const TargetRegisterClass *> Res =
- TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
-
- // If we picked one of the Zfinx register classes, remap it to the GPR class.
- // FIXME: When Zfinx is supported in CodeGen this will need to take the
- // Subtarget into account.
- if (Res.second == &RISCV::GPRF16RegClass ||
- Res.second == &RISCV::GPRF32RegClass ||
- Res.second == &RISCV::GPRPairRegClass)
- return std::make_pair(Res.first, &RISCV::GPRRegClass);
-
- return Res;
+ return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
}
InlineAsm::ConstraintCode
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/186/builds/13339 Here is the relevant piece of the build log for the reference |
Lukacma
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…gForInlineAsmConstraint. (llvm#164352) The codegen for Zfinx has been supported. So we don't need to remap Zfinx register classes to GPR class.
aokblast
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Oct 30, 2025
…gForInlineAsmConstraint. (llvm#164352) The codegen for Zfinx has been supported. So we don't need to remap Zfinx register classes to GPR class.
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The codegen for Zfinx has been supported. So we don't need to remap Zfinx register classes to GPR class.