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[RISCV] Remove remapping Zfinx register classes to GPR class in getRegForInlineAsmConstraint. #164352

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Merged
merged 1 commit into from
Oct 21, 2025
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[RISCV] Remove remapping Zfinx register classes to GPR class in getRegForInlineAsmConstraint. #164352

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13 changes: 1 addition & 12 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -24047,18 +24047,7 @@ RISCVTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
}
}

std::pair<Register, const TargetRegisterClass *> Res =
TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);

// If we picked one of the Zfinx register classes, remap it to the GPR class.
// FIXME: When Zfinx is supported in CodeGen this will need to take the
// Subtarget into account.
if (Res.second == &RISCV::GPRF16RegClass ||
Res.second == &RISCV::GPRF32RegClass ||
Res.second == &RISCV::GPRPairRegClass)
return std::make_pair(Res.first, &RISCV::GPRRegClass);

return Res;
return TargetLowering::getRegForInlineAsmConstraint(TRI, Constraint, VT);
}

InlineAsm::ConstraintCode
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