[AMDGPU] Handle phys regs in flat_scratch_base_hi operand check #170395
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This stack of pull requests is managed by sgh. |
This was referenced Dec 3, 2025
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@llvm/pr-subscribers-backend-amdgpu Author: Stanislav Mekhanoshin (rampitec) ChangesFull diff: https://github.com/llvm/llvm-project/pull/170395.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 50860a9a8e4c1..088533306c79b 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6260,7 +6260,8 @@ bool SIInstrInfo::isLegalRegOperand(const MachineInstr &MI, unsigned OpIdx,
if (ST.hasFlatScratchHiInB64InstHazard() &&
MO.getReg() == AMDGPU::SRC_FLAT_SCRATCH_BASE_HI && isSALU(MI)) {
if (const MachineOperand *Dst = getNamedOperand(MI, AMDGPU::OpName::sdst)) {
- if (AMDGPU::getRegBitWidth(*MRI.getRegClass(Dst->getReg())) == 64)
+ if (AMDGPU::getRegBitWidth(*RI.getRegClassForReg(MRI, Dst->getReg())) ==
+ 64)
return false;
}
if (Opc == AMDGPU::S_BITCMP0_B64 || Opc == AMDGPU::S_BITCMP1_B64)
diff --git a/llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir b/llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
index e661b6859e09d..e3b28c5518695 100644
--- a/llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
+++ b/llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
@@ -143,3 +143,16 @@ body: |
%0:sreg_32 = COPY $src_flat_scratch_base_hi
%1:sreg_64 = S_BITSET1_B64 %0, undef %1:sreg_64, implicit-def $scc
...
+
+---
+name: s_ashr_i64_phys_dst
+tracksRegLiveness: true
+body: |
+ bb.0:
+
+ ; GCN-LABEL: name: s_ashr_i64_phys_dst
+ ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $src_flat_scratch_base_hi
+ ; GCN-NEXT: $sgpr0_sgpr1 = S_ASHR_I64 undef %1:sreg_64, [[COPY]], implicit-def $scc
+ %0:sreg_32 = COPY $src_flat_scratch_base_hi
+ $sgpr0_sgpr1 = S_ASHR_I64 undef %1:sreg_64, %0, implicit-def $scc
+...
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shiltian
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Dec 3, 2025
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MIR's doesn't account for phys reg while RI's does? These interfaces are confusing…
rampitec
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/162/builds/36343 Here is the relevant piece of the build log for the reference |
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