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[AArch64][SDAG] Combine INSERT_VECTOR_ELT(undef, ) -> VECTOR_SPLAT #173005

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Merged
gbossu merged 1 commit into from
Dec 19, 2025
+13 −14
Merged

[AArch64][SDAG] Combine INSERT_VECTOR_ELT(undef, ) -> VECTOR_SPLAT #173005

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11 changes: 11 additions & 0 deletions llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -27792,6 +27792,17 @@ performInsertVectorEltCombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
if (SDValue Res = removeRedundantInsertVectorElt(N))
return Res;

// Turn INSERT_VECTOR_ELT(undef, Elt, Idx) into SPLAT_VECTOR(Elt)
// Do not bother with inserts into lane 0 because there are patterns to select
// them using INSERT_SUBREG hsub/ssub/dsub.
SDLoc DL(N);
SDValue Vec = N->getOperand(0);
SDValue Elt = N->getOperand(1);
SDValue Idx = N->getOperand(2);
EVT VecVT = Vec.getValueType();
if (VecVT.isScalableVector() && Vec->isUndef() && !isNullConstant(Idx))
return DCI.DAG.getNode(ISD::SPLAT_VECTOR, DL, VecVT, Elt);

return performPostLD1Combine(N, DCI, true);
}

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16 changes: 2 additions & 14 deletions llvm/test/CodeGen/AArch64/sve-insert-element.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -165,20 +165,14 @@ define <vscale x 16 x i8> @test_lanex_16xi8(<vscale x 16 x i8> %a, i32 %x) {
ret <vscale x 16 x i8> %b
}

; TODO: Implement DAG combiner.
; Test the INSERT_VECTOR_ELT(poison, ...) -> VECTOR_SPLAT combiner
; <vscale x 16 x i8> is used as a proxy for testing using IR, but the combiner
; is agnostic of the element type.

define <vscale x 16 x i8> @test_lanex_16xi8_poison(i8 %e, i32 %x) {
; CHECK-LABEL: test_lanex_16xi8_poison:
; CHECK: // %bb.0:
; CHECK-NEXT: index z0.b, #0, #1
; CHECK-NEXT: mov w8, w1
; CHECK-NEXT: ptrue p0.b
; CHECK-NEXT: mov z1.b, w8
; CHECK-NEXT: cmpeq p0.b, p0/z, z0.b, z1.b
; CHECK-NEXT: mov z0.b, p0/m, w0
; CHECK-NEXT: mov z0.b, w0
; CHECK-NEXT: ret
%b = insertelement <vscale x 16 x i8> poison, i8 %e, i32 %x
ret <vscale x 16 x i8> %b
Expand All @@ -187,13 +181,7 @@ define <vscale x 16 x i8> @test_lanex_16xi8_poison(i8 %e, i32 %x) {
define <vscale x 16 x i8> @test_lanex_16xi8_poison_imm(i8 %e, i32 %x) {
; CHECK-LABEL: test_lanex_16xi8_poison_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: index z0.b, #0, #1
; CHECK-NEXT: mov w8, w1
; CHECK-NEXT: ptrue p0.b
; CHECK-NEXT: mov z1.b, w8
; CHECK-NEXT: mov w8, #5 // =0x5
; CHECK-NEXT: cmpeq p0.b, p0/z, z0.b, z1.b
; CHECK-NEXT: mov z0.b, p0/m, w8
; CHECK-NEXT: mov z0.b, #5 // =0x5
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@gbossu gbossu Dec 19, 2025

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Note that I haven't checked the immediate range, as I feel this should be tested in the SPLAT_VECTOR tests. Tbh this would be great to test the DAGCombiner independently of ISel patterns, but I don't think SDAG allows such fine-grained testing (unlike GlobalISel)

; CHECK-NEXT: ret
%b = insertelement <vscale x 16 x i8> poison, i8 5, i32 %x
ret <vscale x 16 x i8> %b
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