AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (44)#209734
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Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
This was referenced Jul 15, 2026
arsenm
marked this pull request as ready for review
July 15, 2026 11:34
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@llvm/pr-subscribers-llvm-globalisel @llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) ChangesMechanically migrate the command-line target spelling on llc/opt RUN lines in Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8) Patch is 130.44 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/209734.diff 100 Files Affected:
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
index aad9176c7be8e..8a17decb4e998 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
@@ -1,18 +1,18 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=CI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9PLUS %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9PLUS %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -O0 -run-pass=legalizer -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX11PLUS,GFX11PLUS-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -O0 -run-pass=legalizer -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX11PLUS,GFX11PLUS-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -O0 -run-pass=legalizer -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -O0 -run-pass=legalizer -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=CI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=VI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX9PLUS %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX9PLUS %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX11PLUS %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+real-true16 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX12 %s
+# RUN: llc -mtriple=amdgpu7.04-amd-amdhsa -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=CI %s
+# RUN: llc -mtriple=amdgpu8.03-amd-amdhsa -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=VI %s
+# RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9PLUS %s
+# RUN: llc -mtriple=amdgpu10.10-amd-amdhsa -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX9PLUS %s
+# RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -O0 -run-pass=legalizer -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX11PLUS,GFX11PLUS-TRUE16 %s
+# RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -O0 -run-pass=legalizer -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX11PLUS,GFX11PLUS-FAKE16 %s
+# RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -O0 -run-pass=legalizer -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s
+# RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -O0 -run-pass=legalizer -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s
+# RUN: llc -mtriple=amdgpu7.04-amd-amdhsa -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=CI %s
+# RUN: llc -mtriple=amdgpu8.03-amd-amdhsa -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=VI %s
+# RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX9PLUS %s
+# RUN: llc -mtriple=amdgpu10.10-amd-amdhsa -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX9PLUS %s
+# RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -mattr=+real-true16 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX11PLUS %s
+# RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -mattr=+real-true16 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX12 %s
---
name: test_load_flat_s1_align1
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
index 8ca93ff3e809f..9d5ceec33b86f 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
@@ -1,22 +1,22 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -global-isel-abort=0 -pass-remarks-missed='gisel.*' %s 2> %t.err -o - | FileCheck -check-prefix=SI %s
+# RUN: llc -mtriple=amdgpu6.00-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 -pass-remarks-missed='gisel.*' %s 2> %t.err -o - | FileCheck -check-prefix=SI %s
# RUN: FileCheck -check-prefix=ERR %s < %t.err
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI-HSA %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI-MESA %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 -run-pass=legalizer -global-isel-abort=0 -pass-remarks-missed='gisel.*' 2> %t.err %s -o - | FileCheck -check-prefixes=GFX9-HSA %s
+# RUN: llc -mtriple=amdgpu7.04-amd-amdhsa -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI-HSA %s
+# RUN: llc -mtriple=amdgpu7.04-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI-MESA %s
+# RUN: llc -mtriple=amdgpu8.03-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s
+# RUN: llc -mtriple=amdgpu9.00-amd-amdhsa -O0 -run-pass=legalizer -global-isel-abort=0 -pass-remarks-missed='gisel.*' 2> %t.err %s -o - | FileCheck -check-prefixes=GFX9-HSA %s
# RUN: FileCheck -check-prefix=ERR %s < %t.err
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX9-MESA %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX9-HSA %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX9-MESA %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX11-HSA,GFX11-HSA-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX11-HSA,GFX11-HSA-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX11-MESA,GFX11-MESA-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX11-MESA,GFX11-MESA-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX12-HSA,GFX12-HSA-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX12-HSA,GFX12-HSA-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX12-MESA,GFX12-MESA-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX12-MESA,GFX12-MESA-FAKE16 %s
+# RUN: llc -mtriple=amdgpu9.00-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX9-MESA %s
+# RUN: llc -mtriple=amdgpu10.10-amd-amdhsa -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX9-HSA %s
+# RUN: llc -mtriple=amdgpu10.10-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX9-MESA %s
+# RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX11-HSA,GFX11-HSA-TRUE16 %s
+# RUN: llc -mtriple=amdgpu11.00-amd-amdhsa -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX11-HSA,GFX11-HSA-FAKE16 %s
+# RUN: llc -mtriple=amdgpu11.00-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX11-MESA,GFX11-MESA-TRUE16 %s
+# RUN: llc -mtriple=amdgpu11.00-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX11-MESA,GFX11-MESA-FAKE16 %s
+# RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX12-HSA,GFX12-HSA-TRUE16 %s
+# RUN: llc -mtriple=amdgpu12.00-amd-amdhsa -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX12-HSA,GFX12-HSA-FAKE16 %s
+# RUN: llc -mtriple=amdgpu12.00-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX12-MESA,GFX12-MESA-TRUE16 %s
+# RUN: llc -mtriple=amdgpu12.00-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX12-MESA,GFX12-MESA-FAKE16 %s
# ERR-NOT: remark
# ERR: remark: <unknown>:0:0: unable to legalize instruction: %{{[0-9]+}}:_(<2 x s32>) = G_LOAD %{{[0-9]+}}:_(p1) :: (load (<2 x s16>), align 1, addrspace 1) (in function: test_extload_global_v2s32_from_v2s16_align1)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
index e1df4a5f9b1ff..3cfd6a321f4f2 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
@@ -1,20 +1,20 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -mattr=-enable-ds128 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=bonaire -mattr=+enable-ds128 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI-DS128 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer -mattr=-unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -O0 -run-pass=legalizer -mattr=+unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9-UNALIGNED %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -O0 -run-pass=legalizer -mattr=-unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX10 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -O0 -run-pass=legalizer -mattr=+unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX10-UNALIGNED %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11-UNALIGNED,GFX11-UNALIGNED-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11-UNALIGNED,GFX11-UNALIGNED-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12-UNALIGNED,GFX12-UNALIGNED-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12-UNALIGNED,GFX12-UNALIGNED-FAKE16 %s
+# RUN: llc -mtriple=amdgpu6.00-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s
+# RUN: llc -mtriple=amdgpu7.04-mesa-mesa3d -mattr=-enable-ds128 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI %s
+# RUN: llc -mtriple=amdgpu7.04-mesa-mesa3d -mattr=+enable-ds128 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI-DS128 %s
+# RUN: llc -mtriple=amdgpu8.03-mesa-mesa3d -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s
+# RUN: llc -mtriple=amdgpu9.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=-unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s
+# RUN: llc -mtriple=amdgpu9.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=+unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9-UNALIGNED %s
+# RUN: llc -mtriple=amdgpu10.10-mesa-mesa3d -O0 -run-pass=legalizer -mattr=-unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX10 %s
+# RUN: llc -mtriple=amdgpu10.10-mesa-mesa3d -O0 -run-pass=legalizer -mattr=+unaligned-access-mode -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX10-UNALIGNED %s
+# RUN: llc -mtriple=amdgpu11.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
+# RUN: llc -mtriple=amdgpu11.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
+# RUN: llc -mtriple=amdgpu11.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11-UNALIGNED,GFX11-UNALIGNED-TRUE16 %s
+# RUN: llc -mtriple=amdgpu11.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX11-UNALIGNED,GFX11-UNALIGNED-FAKE16 %s
+# RUN: llc -mtriple=amdgpu12.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s
+# RUN: llc -mtriple=amdgpu12.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=-unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s
+# RUN: llc -mtriple=amdgpu12.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,+real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12-UNALIGNED,GFX12-UNALIGNED-TRUE16 %s
+# RUN: llc -mtriple=amdgpu12.00-mesa-mesa3d -O0 -run-pass=legalizer -mattr=+unaligned-access-mode,-real-true16 -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=GFX12-UNALIGNED,GFX12-UNALIGNED-FAKE16 %s
---
name: test_load_local_s1_align1
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
index da88d5f13c1eb..4b52e96f5a5ef 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s
+# RUN: llc -mtriple=amdgpu6.00-mesa-mesa3d -run-pass=legalizer %s -o - | FileCheck -check-prefix=SI %s
--- |
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
index 4f123b4aa9004..72615bb1b7cda 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
@@ -1,20 +1,20 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tahiti -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=SI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=CI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=VI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX9 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefix=GFX10 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=+real-true16 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-TRUE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -O0 -run-pass=legalizer -global-isel-abort=0 -mattr=-real-true16 %s -o - | FileCheck -check-prefixes=GFX12,GFX12-FAKE16 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tahiti -mattr=-unaligned-access-mode -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=SI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -mattr=-unaligned-access-mode -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=CI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -mattr=-unaligned-access-mode -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=VI %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX9 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX10 %s
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+real-true16 -mattr=-unaligned-access-mode -O0 -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck -check-prefixes=UNALIGNED_GFX11 %s
-# RUN: llc -mtriple=amdgcn-am...
[truncated]
|
petar-avramovic
approved these changes
Jul 15, 2026
Base automatically changed from
users/arsenm/llvm/amdgpu-migrate-tests-subarch-42
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July 15, 2026 12:47
This was referenced Jul 15, 2026
This was referenced Jul 15, 2026
pedroMVicente
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Jul 15, 2026
llvm#209734) Mechanically migrate the command-line target spelling on llc/opt RUN lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu. Co-Authored-By: Claude <noreply@anthropic.com> (Claude-Opus-4.8)
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Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu= to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude noreply@anthropic.com (Claude-Opus-4.8)