[SLP][NFC]Add a test with non-profitable wide vectorization, NFC

[alexey-bataev]

No description provided.

[llvmorg-github-actions]

@llvm/pr-subscribers-llvm-transforms

Author: Alexey Bataev (alexey-bataev)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/211367.diff

1 Files Affected:

• (added) llvm/test/Transforms/SLPVectorizer/AArch64/wide-store.ll (+52)

diff --git a/llvm/test/Transforms/SLPVectorizer/AArch64/wide-store.ll b/llvm/test/Transforms/SLPVectorizer/AArch64/wide-store.ll
new file mode 100644
index 0000000000000..51c2040a86d64
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/AArch64/wide-store.ll
@@ -0,0 +1,52 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -mtriple=aarch64-unknown-linux-gnu -passes=slp-vectorizer -mcpu=grace -S < %s | FileCheck %s
+
+define void @test(ptr %p, float %conv, i64 %n) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[P:%.*]], float [[CONV:%.*]], i64 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[ENTRY:.*]]:
+; CHECK-NEXT:    br label %[[FOR_BODY:.*]]
+; CHECK:       [[FOR_COND_CLEANUP:.*]]:
+; CHECK-NEXT:    ret void
+; CHECK:       [[FOR_BODY]]:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT:    [[OUT:%.*]] = phi ptr [ [[P]], %[[ENTRY]] ], [ [[OUT_NEXT:%.*]], %[[FOR_BODY]] ]
+; CHECK-NEXT:    [[M2:%.*]] = fmul float [[CONV]], 0.000000e+00
+; CHECK-NEXT:    [[M3:%.*]] = fmul float [[CONV]], 0.000000e+00
+; CHECK-NEXT:    [[S0:%.*]] = fsub float 0.000000e+00, [[CONV]]
+; CHECK-NEXT:    [[TMP0:%.*]] = insertelement <4 x float> <float poison, float poison, float poison, float -0.000000e+00>, float [[S0]], i64 0
+; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[M2]], i64 1
+; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[M3]], i64 2
+; CHECK-NEXT:    [[TMP3:%.*]] = fadd contract <4 x float> <float -0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00>, [[TMP2]]
+; CHECK-NEXT:    store <4 x float> [[TMP3]], ptr [[OUT]], align 4
+; CHECK-NEXT:    [[OUT_NEXT]] = getelementptr inbounds i8, ptr [[OUT]], i64 16
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
+; CHECK-NEXT:    br i1 [[EC]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]]
+;
+entry:
+  br label %for.body
+
+for.cond.cleanup:
+  ret void
+
+for.body:
+  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+  %out = phi ptr [ %p, %entry ], [ %out.next, %for.body ]
+  %s0 = fsub float 0.000000e+00, %conv
+  store float %s0, ptr %out, align 4
+  %m1 = fmul float %conv, 0.000000e+00
+  %a1 = fadd contract float %m1, 0.000000e+00
+  %o1 = getelementptr inbounds i8, ptr %out, i64 4
+  store float %a1, ptr %o1, align 4
+  %m2 = fmul float %conv, 0.000000e+00
+  %a2 = fadd contract float %m2, 0.000000e+00
+  %o2 = getelementptr inbounds i8, ptr %out, i64 8
+  store float %a2, ptr %o2, align 4
+  %o3 = getelementptr inbounds i8, ptr %out, i64 12
+  store float 0.000000e+00, ptr %o3, align 4
+  %out.next = getelementptr inbounds i8, ptr %out, i64 16
+  %iv.next = add i64 %iv, 1
+  %ec = icmp eq i64 %iv.next, %n
+  br i1 %ec, label %for.cond.cleanup, label %for.body
+}