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Introduction

CPUCapabilities.NET provides detailed information about the underlying CPU to applications running on the Microsoft .NET Framework. It consists of two components: A tiny "unmanaged" helper library (written in C++), which performs the actual CPU detection, and a "managed" wrapper class (written in C#), which encapsulates the required P/Invoke calls.

The information provided by CPUCapabilities.NET include the CPU architecture, the number of (logical) CPU cores, the CPU "vendor" and "brand" strings, the CPU "model" and "family" IDs as well as the supported CPU capabilities (instruction set extensions), such as MMX, 3DNow!, SSE, SSE2, SSE3, SSSE3, SSE4.1/4.2, SSE4a, FMA3, FMA4, XOP, AVX, AVX2 or AVX-512.

The "unmanaged" library is provided as separate 32‑Bit (x86) and 64‑Bit (x64) DLL files, allowing it to work on both platforms; AnyCPU assemblies automatically use the appropriate DLL.

Background

To the best of my knowledge, the Microsoft .NET Framework does not provide a built-in way to acquire detailed information about the underlying CPU. The Environment class can be used to check wether we are running on a 64‑Bit operating system, which would imply that we are running on a 64‑Bit (x64) processor, but it does not provide any further information about the CPU. The Microsoft .NET Framework also provides APIs for consuming data and events from the WMI (Windows Management Instrumentation) infrastructure. Unfortunately, even though the the Win32_Processor WMI class can provide various information about the CPU, it does not reveal the supported CPU capabilities (i.e. instruction set extensions).

If using P/Invoke is an option, then we can query the Win32 API directly. The functions GetNativeSystemInfo() and especially IsProcessorFeaturePresent() look promising at a first glance, but it quickly becomes evident that these functions do not support "modern" CPU instruction set extensions, such as AVX, AVX2 or AVX-512. There also is the GetEnabledXStateFeatures() function, which may be used to detect whether AVX support is enabled on the operating system-level, which would imply that at least AVX is supported by the CPU. But, unfortunately, there is no way to detect whether AVX2 or AVX-512 are supported too. The Win32 API does not currently provide a way to detect AVX2 or AVX-512.

After all, using the CPUID instruction is the only reliable way to detect the supported CPU capabilities, including all the instruction set extensions that were are interested in. The XGETBV instruction is also required, in order to test whether AVX support is enabled on the operating system-level. However, since it is not possible to call these instructions directly from "managed" code in the Microsoft .NET Framework, it becomes necessary to use an "unmanaged" helper library for this purpose. This is exactly how the CPUCapabilities.NET library works!

Managed API

Information about the CPU are provided by the CPU class, which is located in the Muldersoft.CPUCapabilitiesDotNet namespace.

All information are provided by a set of read-only properties. The following properties are available:

• Architecture – The architecture of the CPU:

  • CPU_ARCH_X86: x86 architecture (32‑Bit), also known as "i386" or "IA-32"
  • CPU_ARCH_X64: x64 architecture (64‑Bit), also known as "x86-64", "AMD64" or "Intel 64" (formerly "EM64T")
  • Note: This library reports the "usable" CPU architecture. On a 64‑Bit operating system, the CPU architecture will be reported as x64 (64‑Bit), regardless of whether the current process is 32‑Bit or 64‑Bit. On a 32‑Bit operating system, the CPU architecture will be reported as x86 (32‑Bit), even if the underlying CPU does support the x64 (64‑Bit) extensions.

• Count – The number of available processors (CPU cores).

  • Note: For CPUs with HyperThreading (Intel) or Simultaneous Multithreading (AMD), this value is equal to the number of "logical" CPU cores.

• Vendor – The CPU vendor ID string, 12 characters in length, for example:

  • GenuineIntel: Intel
  • AuthenticAMD: AMD
  • CyrixInstead: Cyrix

• Information – The CPU identifier, which is composed of the following fields:

  • Type: The CPU type (e.g. OEM Processor, Intel Overdrive Processor or Dual processor)
  • Family: The effective CPU family ID, as computed from the CPU's "family ID" and "extended family ID" values
  • Model: The effective CPU model ID, as computed from the CPU's "family ID", "model ID" and "extended model ID" values
  • Stepping: The CPU stepping, i.e. product revision number (errata or other changes)
  • RawFamily: The (basic) CPU family ID – raw value
  • RawFamilyExt: The extended CPU family ID – raw value
  • RawModel: The (basic) CPU model ID – raw value
  • RawModelExt: The extended CPU model ID – raw value

• Capabilities – The capabilities (instruction set extensions) supported by the CPU. This can be the bitwise OR combination of any of the following capability flags:

  • CPU_3DNOW: 3DNow!
  • CPU_3DNOWEXT: Extended 3DNow!
  • CPU_ADX: Multi-Precision Add-Carry Instruction Extensions (ADX)
  • CPU_AES: Advanced Encryption Standard (AES) instruction set
  • CPU_AVX: Advanced Vector Extensions (AVX)
  • CPU_AVX2: Advanced Vector Extensions 2 (AVX2)
  • CPU_AVX512_BITALG: AVX-512 – (BITALG)
  • CPU_AVX512_BW: AVX-512 – Byte and Word Instructions (BW)
  • CPU_AVX512_CD: AVX-512 – Conflict Detection Instructions (CD)
  • CPU_AVX512_DQ: AVX-512 – Doubleword and Quadword Instructions (DQ)
  • CPU_AVX512_ER: AVX-512 – Exponential and Reciprocal Instructions (ER)
  • CPU_AVX512_F: AVX-512 – Foundation (F)
  • CPU_AVX512_IFMA: AVX-512 – Integer Fused Multiply Add (IFMA)
  • CPU_AVX512_PF: AVX-512 – Prefetch Instructions (PF)
  • CPU_AVX512_VBMI: AVX-512 – Vector Bit Manipulation Instructions (VBMI)
  • CPU_AVX512_VBMI2: AVX-512 – Vector Bit Manipulation Instructions 2 (VBMI2)
  • CPU_AVX512_VL: AVX-512 – Vector Length Extensions (VL)
  • CPU_AVX512_VNNI: AVX-512 – Vector Neural Network Instructions (VNNI)
  • CPU_AVX512_VPOPCNTDQ: AVX-512 – Vector Population Count Double and Quad-word (VPOPCNTDQ)
  • CPU_BMI1: Bit Manipulation Instruction Set 1 (BMI1)
  • CPU_BMI2: Bit Manipulation Instruction Set 2 (BMI2)
  • CPU_CLFSH: CLFLUSH instruction (SSE2)
  • CPU_CMOV: CMOV and FCMOV instructions
  • CPU_CX16: CMPXCHG16B instruction
  • CPU_CX8: CMPXCHG8B instruction
  • CPU_ERMS: Enhanced REP MOVSB and STOSB instructions
  • CPU_FMA3: Fused multiply–Add – three operands version (FMA3)
  • CPU_FMA4: Fused Multiply–Add – four operands version (FMA4)
  • CPU_FPU: x87 FPU
  • CPU_FSGSBASE: FSGSBASE – directly manipulate the FS and GS base registers
  • CPU_FXSR: FXSAVE and FXRSTOR instructions
  • CPU_HLE: Transactional Synchronization Extensions (TSX) – Hardware Lock Elision (HLE)
  • CPU_HTT: Hyper-Threading Technology
  • CPU_INVPCID: INVPCID instruction
  • CPU_LAHF: LAHF and SAHF instructions in long mode
  • CPU_LZCNT: Leading Zeros Count (LZCNT)
  • CPU_MMX: Multi Media Extension (MMX)
  • CPU_MMXEXT Extended MMX – subset of SSE instructions (extended MMX instructions) supported by Athlon microarchitecture (and later)
  • CPU_MONITOR: MONITOR and MWAIT instructions (SSE3)
  • CPU_MOVBE: MOVBE instruction
  • CPU_MSR: Model-Specific Register (MSR)
  • CPU_OSXSAVE: XSAVE enabled by OS
  • CPU_PCLMULQDQ: PCLMULQDQ instruction
  • CPU_POPCNT: Population Count (POPCNT)
  • CPU_PREFETCHWT1: PREFETCHWT1 instruction
  • CPU_RDRND: Hardware-generated random value (RDRND) – Intel Secure Key Technology
  • CPU_RDSEED: Hardware-generated random seed value (RDSEED) – Intel Secure Key Technology
  • CPU_RDTSCP: RDTSCP instruction
  • CPU_RTM: Transactional Synchronization Extensions (TSX) – Restricted Transactional Memory (RTM)
  • CPU_SEP: SYSENTER and SYSEXIT instructions
  • CPU_SHA: Intel SHA extensions
  • CPU_SSE: Streaming SIMD Extensions (SSE)
  • CPU_SSE2: Streaming SIMD Extensions 2 (SSE2)
  • CPU_SSE3: Streaming SIMD Extensions 3 (SSE3)
  • CPU_SSE41: Streaming SIMD Extensions 4.1 (SSE4.1) – subset of SSE4 supported by Penryn microarchitecture (and later)
  • CPU_SSE42: Streaming SIMD Extensions 4.2 (SSE4.2) – subset of SSE4 supported by Nehalem microarchitecture (and later)
  • CPU_SSE4a: Streaming SIMD Extensions 4a – subset of SSE4 supported by AMD only, not supported by Intel
  • CPU_SSSE3: Supplemental Streaming SIMD Extensions 3 (SSSE3)
  • CPU_SYSCALL: SYSCALL instruction
  • CPU_TBM: Trailing Bit Manipulation (TBM)
  • CPU_TSC: Time Stamp Counter (TSC)
  • CPU_XOP: eXtended Operations (XOP)
  • CPU_XSAVE: XSAVE instruction
  • Note: This library reports the "usable" CPU capabilities. Capabilities are reported as supported, if and only if they are supported by both, the CPU and the operating system. For example, the AVX instruction set extension requires support by the operating system, but support for AVX was not added to Windows until Windows 7 with SP-1.

• Brand – The CPU brand string, which is at most 48 characters in length, for example:

  • AMD Ryzen 9 3900X 12-Core Processor
  • Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz

License

This work has been released under the CC0 1.0 Universal license.

For details, please refer to:
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