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axc51: Fix destination RAM type in XCHD A, @R0/@R1 #14312

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Merged
merged 1 commit into from
Oct 11, 2025
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axc51: Fix destination RAM type in XCHD A, @R0/@R1 #14312

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2 changes: 1 addition & 1 deletion src/devices/cpu/axc51/axc51ops.hxx
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Original file line number Diff line number Diff line change
Expand Up @@ -994,7 +994,7 @@ void axc51base_cpu_device::xchd_a_ir(uint8_t r)
ir_data = iram_indirect_read(R_REG(r)); //Grab data pointed to by R0 or R1
acc = ACC; //Grab ACC value
SET_ACC( (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
iram_write(R_REG(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
iram_indirect_write(R_REG(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
}

//XRL data addr, A /* 1: 0110 0010 */
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