HISIM v2.0

HISIM 2.0 covers:

1. Systolic arrays for convolution, matrix multiplication, and attention layers;
2. RISC-V CPU CVA6 for nonlinear layer types in AI models; and
3. Memory models capturing on-chip SRAM buffer size dependencies and off-chip DDR communication costs.
4. Usability improvements include ONNX-MLIR compiler integration for accurate AI model data; a hardware mapping module for user-defined placement via input files like Chip Map, System Map, and Layer Map; and graph construction for easy hardware module sizing using specification files.