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@github-actions github-actions released this 29 Aug 04:39
· 48 commits to main since this release
v0.11.0
a22ad21

The community round

Fifteen pull requests from nine contributors, and the queue that produced them
is now the healthiest it has been. Three new tools, two response-shape
changes, and a handful of fixes for things that were quietly wrong.

20 toolsets · 217 registered tools · 223 total.

New tools

  • set_predefined_sizes / get_predefined_sizes (verification) — the PCB
    Editor's Pre-defined Sizes palette, the W / Shift+W dropdowns. Agents were
    reaching for set_design_rules or create_netclass and getting neither:
    those write DRC floors and netclass optima, and the palette is a third
    .kicad_pro key. Thanks @jhaubrich (#345/#346).
  • delete_graphics (pcb_board) — the delete verb the board-graphics
    surface never had. add_board_outline and set_board_size both append, so
    the outline was effectively write-once: shrinking a board mid-layout meant
    deleting the old edges by hand in KiCad. Now it is
    delete_graphics(layer='Edge.Cuts') then add_board_outline. Thanks
    @pauliuszaleckas (#335).

Behaviour changes

Both of these change a response, and both do it in the same direction — saying
what is true rather than what was asked for.

  • get_netclasses reports resolved settings, with inherits naming what a
    class takes from the Default and missing_fields naming what nothing
    resolves. Callers reading null as "unset" need updating: null was
    claiming a class had no clearance when it had inherited the Default's.
    (#326/#333, @omelia-iliffe.)
  • auto_place_from_schematic and refine_placement_force_directed report
    held     — every footprint they refused to move, and why.

Fixes

  • Neither placement planner will relocate a footprint you locked in KiCad
    (#350, reported by @triglav-modular). The root cause was a level below the
    report: the lock was never parsed at all, so both planners moved locked
    parts — refine_placement_force_directed's locked argument had only ever
    been a caller-supplied list. Locked parts are now obstacles, and
    auto_place_from_schematic gained the locked argument its sibling
    advertised.
  • update_footprints_from_library accepts ordinary KiCad footprints again
    (#331, @neusse). It refused fp_text user, which 15,238 of the 15,447
    installed official footprints carry — so the advertised workflow failed for
    the dominant case. Now preserved losslessly, with unsupported text modifiers
    still refused rather than silently altered.
  • The Default netclass is written complete, and an incomplete one repaired
    (#326). Omitting wire_width made Eeschema suppress junction dots across the
    whole project.
  • Multi-unit symbols resolve through the placed unit in design_review,
    sch_analysis, sch_export and sch_batch — closing #182 (#336/#349).
  • Per-user Windows KiCad installations are discovered (#254), including
    HKCU/HKLM registry records and %LOCALAPPDATA%.
  • MCP startup no longer reinstalls guidance after an explicit uninstall
    (#242). Startup performs no guidance installation at all now; konnect init
    does.
  • Placed symbols carry Datasheet and Description from the library (#226)
    — KiCad's BOM exporter reads the instance, not lib_symbols, so
    Konnect-authored schematics were exporting blank metadata.
  • Structural library/lib-table field parsing (#322), design-review nets resolved
    through the net graph rather than a 0.5 mm text scan (#336), schematic text
    formatting (#353), junction sheet-pin coverage (#332), and a shared IPC
    classification gate with a document-answering mock (#334).

Project

  • GOVERNANCE.md
    now states how the project is run: who maintains what, that a green PR may be
    merged by its author, how work is claimed, the release protocol, and the
    evidence rules. .github/CODEOWNERS registers ownership areas.
  • cargo xtask fix-doc-counts derives every documented tool count from the
    registry. Roughly seven documents quoted those numbers by hand, so any two
    PRs that added a tool conflicted by construction — and v0.10.0 conflicted
    eleven open PRs at once. The guard still fails on stale counts; the command is
    how you satisfy it.

Known limitations

  • Honouring (locked) is not the whole of #350. Measured on a real board,
    only 12 of 42 footprints with through-holes were locked, so automatic
    placement still moves mechanically constrained parts that nobody locked.
    Counting thru_hole / np_thru_hole is the follow-up.
  • The bundled skill references are still not reachable through progressive
    disclosure, and the PreToolUse hook's output does not reach the model's
    context (#357, #358).
  • The connectivity index remains bus-blind (#328); KiCad ERC is authoritative
    for bus sheets. move_connected still refuses rather than dragging wires
    (#315).

Thanks

@neusse, @pauliuszaleckas, @anyn99, @omelia-iliffe, @triglav-modular,
@jhaubrich, @nordic-style, @simachines, @komar3456 — and @neusse in
particular, who audited the released v0.10.0 package from outside and found
both of the defects that forced v0.10.1.

What's Changed

  • docs(troubleshooting): explain Copilot tool limits by @neusse in #347
  • fix(pcb): preserve library user text during refresh by @neusse in #348
  • fix(schematic): preserve library metadata on placement by @neusse in #359
  • fix(cli): require explicit init for guidance by @neusse in #343
  • fix(windows): discover per-user KiCad installations by @neusse in #344
  • fix(schematic): resolve analysis pins by placed unit by @neusse in #349
  • fix(pcb): write the Default netclass complete, and repair one that is not by @omelia-iliffe in #333
  • test(sch): cover the sheet-pin branch of the junction reconciler by @triglav-modular in #332
  • fix(library): read footprint and lib-table fields from the parsed tree by @pauliuszaleckas in #322
  • fix(design-review): resolve audit nets through the net graph by @pauliuszaleckas in #336
  • feat(sch): let add_schematic_text set bold, italic, thickness and colour by @anyn99 in #353
  • refactor(ipc): share the IPC classification gate and board test mock by @pauliuszaleckas in #334
  • feat(pcb): add set_predefined_sizes for the router palette by @jhaubrich in #346
  • feat(pcb): add delete_graphics so a board outline can be replaced by @pauliuszaleckas in #335

New Contributors

Full Changelog: v0.10.1...v0.11.0

Contributors

jhaubrich, pauliuszaleckas, and 7 other contributors
Assets 9
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