Fix CUDA batched GEMV grid overflow - #3929
Conversation
zcbenz
left a comment
There was a problem hiding this comment.
Sorry but we do not review code that never got tested.
|
@jasp-nerd I have an RTX 5050 (sm_120) and verified this patch on it (CUDA 12.8), since it was closed for lack of a hardware run. It applies cleanly on current main. Before the patch, Would it be possible to reopen this? Happy to help if anything else is needed. |
|
Thanks so much for testing this, @sashko-zakharchuk! @zcbenz, would this hardware verification be enough to reopen the PR? |
cddabb4 to
9bc719f
Compare
Proposed changes
Fixes #3858.
CUDA batched GEMV used
grid.yas a linear batch index, so valid batches above65,535 exceeded the CUDA grid-dimension limit before kernel execution.
gemv_gatherused the same launch geometry.This change splits the batch dimension over
grid.yandgrid.z, reconstructsthe logical batch index in both kernels, and ignores the one padded slot when
the rectangular grid is not exact. It also keeps empty gathered outputs from
reaching a zero-sized launch.
The regression tests cover ordinary and gathered GEMV at batch sizes 65,535,
65,536, and 65,537 using small analytical inputs, plus an empty gather.
Validation:
This machine does not have a CUDA toolkit or NVIDIA GPU, so CUDA compilation
and execution are left to the repository CI matrix.
I used an AI coding assistant to help research and prepare this change; I
remain responsible for the submitted patch.
Checklist
pre-commit run --all-filesto format my code / installed pre-commit prior to committing changes