SAPHO & AURORA v6.2.0

Highlights

Aurora Intelligence

• New AI tools set_top_level and set_testbench_top — the assistant can now mark Verilog files from chat.
• Tool-call history persisted — opening a saved chat replays every function call (done / failed / denied) as a static chip.
• Editor magic-wand animation when the AI writes to the active file; smooth fade-reveal for incoming chat messages.
• SYSTEM_PROMPT rebuilt from the yanc grammar (CMMComp.y/.l) and real production CMM examples — much sharper CMM code generation.
• New comprehensive function-calling reference at docs/aurora-intelligence-tools.md.

File tree

• Right-click on any .v / .sv now offers both "Set as Top Level" and "Set as Testbench Top", regardless of auto-detected category.
• setTopLevel / setTestbenchTop do a true cross-array move — flipping a file between synthesizable and testbench is one click.
• "Imported" separator for user-dragged files (when processor groups are also present).
• Right-click on a processor separator now exposes a "Delete processor" action that removes the entire processor folder.
• Status bar refreshes on every SPF mutation, not just saveConfiguration().

Stability

• zod pinned to ^3.25.76 and every require('ai' | '@ai-sdk/*') wrapped in defensive try/catch — a broken AI install (missing zod/v4, missing transitive dep, etc.) now gracefully disables AI features instead of crashing the main process with an Uncaught Exception dialog.
• Fixed silent failure when the AI tried to open a file in the main editor pane (pane 0 is owned by TabManager, not SplitEditorManager).

Editor & UX

• createFile auto-registers .v / .sv / .vh files in synthesizableFiles, so the file tree updates immediately when the user (or the AI) creates a Verilog file.
• _classifyAll no longer overwrites an explicit isTopLevel choice during auto-reclassification.

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Installer: sapho-aurora-Setup-v6.2.0.exe (155 MB) — NSIS one-click installer, signed, bundles the full toolchain (yanc compiler, iverilog, gtkwave, PRISM/yosys, 7-Zip).