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Meeting 2026 07 06
- Date: Monday, July 6, 2026
- Time: (Slot #1) @ 12 pm - 1 pm US Eastern Daylight Time (View Meeting Time in Your Timezone)
- Location: Virtual Meeting.
- Meeting Link: openqse.org/captcha
- Next: Monday, July 13, 2026 (Slot #2) 7 pm - 8 pm US Eastern Daylight Time (View Meeting Time in Your Timezone)
- Architecture Seminar Series: HPE - Masoud Mohseni
| Person | Institution |
|---|---|
| Amir Shehata | Oak Ridge National Laboratory |
| Sakshi Chhabra | Indian Institute of Science |
| Mahmoud Elkarargy | Brightskies |
| Laura Schulz | Argonne National Laboratory |
| Michael Ferguson | Hewlett Packard Enterprise |
| Namit Anand | Hewlett Packard Enterprise |
| Abdur Rahman Hatim | Indian Institute of Science |
| Abdelaziz Rahwan | Brightskies |
| EUN KYUNG LEE | IBM |
| Doug Oucharek | ORNL |
| Gabriella Bettonte | E4 |
| John Children | Quantinuum |
| Nick Wright | NVIDIA |
| Doriana Medic | University of Turin |
| Brandon Neth | Hewlett Packard Enterprise |
| Andy Stone | Hewlett Packard Enterprise |
| Oliver Alvarado Rodriguez | Hewlett Packard Enterprise |
| Robert Wisniewski | Hewlett Packard Enterprise |
| Konrad Wojciechowski | Poznan Supercomputing and Networking Center |
| Oscar Wallis | STFC |
| Kevin K. | A&B |
| Thomas Naughton III | Oak Ridge National Laboratory |
| Claudio Siqueira de Carvalho | IBM |
| Aaron Lott | Hewlett Packard Enterprise |
| Sebastian Stern | Amazon |
| Lukas Burgholzer | Munich Quantum Software Company |
| Patrick Deuley | IonQ |
| Alain Roy | IonQ |
| Aurélien NOBER | Pasqal |
| Humberto Munoz Bauza | Hewlett Packard Enterprise |
| Bran Radovanovic | Oak Ridge National Laboratory |
| Josh Moles | Independent |
| Neal Erickson | Quantinuum |
| Andrea Delgado | QBlox |
| Ahmed Sobhy | Brightskies |
| Smriti Bajaj | Dell |
| Jiri Schindler | Independent |
| In-Saeng Suh | Oak Ridge National Laboratory |
| Jeffrey Heckey | Amazon |
| Roberto Rocco | E4 |
| Elise Jennings | Riverlane |
| Bartosz Cybulski | |
| Yogesh Simmhan | Indian Institute of Science |
| Katie Klymko | NERSC |
| Jim Garrison | IBM |
| Sarah Osama Osman | Brightskies |
| Ashwin Kumar | Julich |
| SCH 204 Meeting Room | |
| Cathy | |
| Ryan Landfield | Oak Ridge National Laboratory |
| Krzysztof Kurowski | Poznan Supercomputing and Networking Center |
| Dan Holme | Qoro |
| Alex Chernoguzov | Quantinuum |
| Jonathan Skone | NERSC |
| Tom Beck | Oak Ridge National Laboratory |
| Valeria Bartsch | Fraunhofer CML |
| Cameron Brunner | Siemens |
- Namit Anand
- Michael Paul Pratt Ferguson
HPE presented their Application-Centric Quantum Supercomputing Framework, focusing on how future fault-tolerant quantum computers (FTQC) should be tightly integrated with HPC systems. The presentation emphasized:
- Distributed quantum simulation
- Quantum error correction (QEC)
- Classical compute requirements for FTQC
- Mid-circuit classical computation
- System architecture for integrated Quantum + HPC environments
The presentation focused on accelerating quantum simulation, particularly:
- Electronic structure simulation
- Materials science
- Chemistry
- Fermi-Hubbard models
Rather than treating quantum computers as standalone accelerators, HPE proposes viewing them as part of a larger HPC workflow.
Typical workflow:
- Classical preprocessing
- Initial state preparation
- Quantum computation
- Classical post-processing
- Repeat over parameter space
A key message was that classical computation remains an essential component, even in a fault-tolerant quantum computing era.
Quantum Phase Estimation (QPE) requires a high-quality initial state.
Observations:
- Better initial states reduce the number of QPE iterations.
- Preparing these states is itself computationally difficult.
- A dedicated HPC cluster may be needed solely to prepare high-quality initial states before execution on the quantum computer.
Key point:
Initial state preparation is significantly underestimated in most resource estimates.
The presentation intentionally focused on:
- Quantum Error Correction (QEC)
- Logical qubits
- Fault-tolerant algorithms
rather than NISQ systems.
Major implications include:
- Shift from minimizing CNOT gates to minimizing T gates.
- Rotation gates become expensive due to magic state distillation.
- Increased compiler complexity.
- Significant real-time decoding requirements.
Discussion centered on QLDPC codes.
Trade-offs identified:
- Accuracy
- Latency
- Hardware utilization
No decoder simultaneously optimizes all three.
Consequences:
- Different workloads require different decoding strategies.
- System architecture must support evolving QEC algorithms.
- CPU, GPU, FPGA, and future accelerators should all be supported.
Two approaches to distributing quantum circuits were discussed.
- Bell pairs connect QPUs.
- Two-qubit gates executed across devices.
- Separate QPUs operate independently.
- Classical post-processing reconstructs the full computation.
Traditional circuit cutting incurs exponential overhead.
HPE proposes reducing this overhead by exploiting physical properties of the simulated system.
Rather than distributing circuits evenly, HPE recommends distributing based on:
- Entanglement structure
- Hamiltonian locality
Key insight:
Distribution cost depends on:
- boundary entanglement
rather than simply:
- number of cut gates
This allows substantially lower communication costs.
Electronic structure Hamiltonians naturally decompose into:
- Gaussian layers
- Coulomb layers
Important findings:
Using covariance matrix techniques:
- Exponential improvement in estimating distribution cost
- Linear-sized representations instead of exponential
Observed behavior similar to:
- Many-body localization
Consequences:
- Low entanglement
- Near constant distribution cost
- Efficient fragmentation
Instead of generic quantum compilers:
The framework continuously:
- Simulates entanglement
- Finds optimal cut locations
- Minimizes communication
- Estimates Bell-pair requirements
Result:
Orders-of-magnitude reduction in distribution complexity.
Examples showed that relatively small FTQC fragments (approximately 6–10 orbital problems) could complete in:
- seconds
- minutes
- occasionally hours
Larger problems could be decomposed into these fragments.
Runtime depends on:
- number of logical qubits
- communication
- hardware technology
Classical resources are required for:
- Initial state optimization
- Entanglement tracking
- Distribution planning
- Post-processing
HPE argued that future quantum supercomputers will require dedicated HPC resources operating alongside the quantum processor.
A major emphasis was placed on this issue.
For difficult chemistry problems:
Initial state preparation may require:
- ~10¹⁰ Toffoli gates
In some cases:
State preparation may cost more than phase estimation itself.
This cost is often omitted from published resource estimates.
HPE proposed using:
- measurements
- feed-forward
- logical adaptive circuits
Benefits include:
- Faster long-range operations
- Shallower circuits
- Significant reductions in state preparation depth
Question (Andrea):
Was tensor-network theory used to determine optimal circuit partitions?
Yes.
Tensor-network methods:
- track entanglement
- identify optimal cut locations
- improve classical simulations
- naturally emerge from many-body localization.
A forthcoming paper was mentioned.
Andrea asked why first-order Trotterization was used.
Response:
- Mainly to expose Gaussian/Coulomb structure.
- Second-order methods could also be used.
- Small time steps preserve accuracy while maintaining the desired decomposition.
Focus shifted to interactions between:
- Quantum hardware
- External classical resources
Primary example:
Quantum Fourier Transform (QFT).
Standard QFT:
O(N²) rotation gates.
Using adaptive circuits:
Reduced to:
O(N)
This is the well-known semi-classical QFT.
The adaptive version requires:
- computing rotation angles
- synthesizing gate approximations
- during execution
Current gate synthesis takes approximately:
4 ms on a laptop.
This is too expensive for today's control electronics.
Current assumptions are insufficient.
Future FTQC systems require:
Quantum Resource ⇄ HPC Compute
during program execution.
Rather than recompiling circuits during execution:
HPE proposes:
- externally controlled conditional gates
Workflow:
- Logical measurement
- Send measurement to HPC
- HPC computes gate sequence
- Send classical control bits back
- Continue execution
Minimal data transfer is required.
Latency—not bandwidth—is the limiting factor.
Michael discussed the recent Quantum Oracle Sketch paper.
Purpose:
Represent massive classical datasets using exponentially less quantum memory.
Requirements:
- External data sampler
- Large classical memory
- Low-latency communication
Again:
HPC integration becomes essential.
HPE expects similar requirements for:
- Feed-forward QSVT
- Quantum machine learning
- Future adaptive algorithms
These algorithms may require:
- optimization
- parameter computation
- classical inference
during quantum execution.
Estimated FTQC clock rates were compared with network latency.
Observation:
Modern HPC interconnects operate on compatible timescales.
Microsecond-scale communication is acceptable.
Millisecond or scheduler-level delays are not.
Recommended architecture:
- Quantum processing units
- Co-located HPC nodes
- CPUs
- GPUs
- FPGAs
- Specialized accelerators
- High-performance, low-latency interconnect
Goals:
- Flexible experimentation
- Mid-circuit classical compute
- Quantum error correction research
- Support for custom hardware accelerators
Question:
Is throughput more important than latency for control systems?
Response:
Large numbers of measurements already occur continuously for QEC.
Logical-level measurements add relatively little additional burden.
Precise throughput estimates are not yet available.
Question:
How much data must be transferred for gate approximation?
Response:
Only approximately:
- hundreds to thousands of bits
Latency matters much more than bandwidth.
Question:
What are the communication requirements?
Response:
Only sampled data is transmitted.
Fast communication is necessary to keep the quantum processor productive.
Question:
Must HPC and quantum hardware be physically adjacent?
Response:
No.
Different floors or buildings are acceptable.
Requirement:
Microsecond-scale HPC networking.
Question:
Does Oracle Sketch require continuously updated data?
Response:
Depends on the application.
Some workloads may sample static datasets.
Others may require computationally generated data.
Question:
How does FTQC change scheduling?
Response:
Future compilers must schedule:
- Magic state factories
- Distillation resources
- Logical qubit allocation
- Gate teleportation
- Resource movement across the processor
Scheduling becomes significantly more dynamic than current quantum compilers.
- Future quantum computing will rely heavily on HPC integration rather than standalone QPUs.
- Classical computation remains essential for preprocessing, state preparation, decoding, compilation, and adaptive execution.
- Initial state preparation is a major, often overlooked, computational bottleneck.
- Entanglement-aware circuit partitioning substantially reduces distributed quantum simulation costs.
- Mid-circuit classical computation requires low-latency HPC resources beyond traditional quantum control electronics.
- Network latency is a primary system design concern; bandwidth requirements are relatively modest.
- HPE advocates a tightly integrated quantum-HPC architecture with flexible classical resources connected via high-performance networking.
| Item | Owner |
|---|---|
| Share upcoming paper on tensor-network structures for electronic structure simulation | HPE (Namit) |
| Continue discussion on FTQC scheduling and compiler architecture in a future session | HPE / ORNL |
| Explore latency and throughput requirements for logical-level adaptive circuits | HPE & ORNL |
| Investigate hardware requirements for externally controlled conditional gates | HPE |
| Continue collaboration on integrated Quantum-HPC system architecture | openQSE participants |