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Remaining Virtex7 support

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@hansfbaier hansfbaier released this 28 Jul 01:13
· 118 commits to stable-backports since this release
0.9.1
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RELEASE-0.9.1

Overview

I decided to merge the virtex7-support branch into stable-backports, since it has been tested on hardware
(see https://github.com/jrrk2/v7-johnson-demo).
The goal is to make it available to a wider audience and to relieve the maintenance burden to drag this now
rather sizeable branch along.

22 non-merge commits, 27 files changed (+4,183 / -248).

Merge of virtex7-support into stable-backports. Brings HW-validated fixes for Vivado-import hybrid flows, open-flow (fresh-synthesis) routing convergence, CARRY4/constant-network improvements, and placer determinism.

Router

  • NEXTPNR_ARC_MAX_VISIT caps per-arc search in both router1 and router2 (no-BB mode too)
  • Router2 skip-failed-arcs for open-flow convergence
  • Router2 dumps overused wires on failure
  • Open-flow convergence fixes in router1 (+277 lines: cascaded route-thru handling)

Placer

  • Deterministic, cross-platform initial placement
  • Bind packer-created chain children of BEL-pinned parents (Vivado-import hybrid flow)
  • CutSpreader crash fix on fully-locked constraint chains
  • Open-flow placement legalisation: pinned-root handling, exclusion bbox, chain-child pre-binding (+132 lines)

CARRY4 / Constant Network

  • Const-GND DI delivery fix: unrouted carry-DI bypass defaults to VCC, not 0. GND DI now buffered through feed-through LUT (O5=0) instead of omitted.
  • Hybrid R0-flow carry: unblock Vivado-import carry packing — BEL-pinned CARRY4 roots, pinned chain segments, pinned LUT drivers
  • Sum-FF co-location: CARRY4-driven FFs constrained into same slice (default-on, opt-out NEXTPNR_NO_CARRY_COUNTER_FIX). Matches Vivado registered adder/counter pattern.
  • Counter "+1" re-encode (NEXTPNR_CARRY_COUNTER_FIX, opt-in): CYINIT=1, DI[0]=0, S[0]=cnt[0] — avoids O5/O6 sharing conflict
  • DI-via-AX path: full 6-input S-LUT slots route DI via AX bypass instead of impossible 5LUT O5 path
  • CO-vs-5FF validity check: detects CARRY4 CO fabric-out xMUX contention
  • PRECYINIT.C0/.C1: constant CARRY4 carry-in realised as config bit (no routing)
  • Complete pwr/gnd constant network for router2 (xilinx/arch.cc: +1,206 lines)
  • Placement legalisation: arch-level infrastructure (xilinx/arch_place.cc: +639 lines)

FASM (Bitstream)

  • LIOI mirror: OLOGIC/ILOGIC route-thru block mirrored from RIOI for left-side IOI tiles (fixes stuck-high OBUFs on VC707 LED bank)
  • LEFT-HP diff-amp: single-ended input skips partner diff-amp borrow when partner drives an output
  • Control-set naming: offending FF named in half-slice control-set disagreement error

Clocking

  • Real MMCM CLKFBOUT→CLKFBIN loop for free MMCMs: old code tied CLKFBIN→VCC, PLL never locked, design dead. Fix preserves dedicated feedback path.
  • PLL/MMCM DRP pin disconnect: const-tied DRP/control pins left unrouted (matches Vivado). Fixes runtime PLL config corruption from spuriously-clocked DRP.
  • BUFGCTRL const control pin disconnect (NEXTPNR_BUFG_CONST_DISCONNECT, opt-in): CE/S/IGNORE pins realised as config bits, not fabric routes
  • IBUFDS→BUFG routed on dedicated clock backbone

Packing

  • Const-tied FF control pin disconnect: SR=GND and CE=VCC pins removed from global const nets, reducing router load (~141 FF resets alone)
  • BRAM CASCADEIN disconnect: const-tied cascade inputs left unrouted
  • RAM32M/RAM64M parent BEL propagation: Vivado-import DPR subcells pinned to stamped site
  • Raw DRAM leaf primitives (RAMD64E/RAMD32/RAMS32): decomposed from Vivado-import netlists
  • GT refclk const-tied disconnect: unused GT refclk inputs left unrouted

Experimental Knobs

Variable Effect Default
NEXTPNR_PIP_BLACKLIST=<file> File-based PIP blacklist off
NEXTPNR_PIP_BLACKLIST_TILE Per-tile-INSTANCE PIP reservation off
NEXTPNR_NO_LONGLINES Disable long-line routing off
NEXTPNR_CARRY_COUNTER_FIX Counter +1 algebraic re-encode off
NEXTPNR_BUFG_CONST_DISCONNECT BUFGCTRL const pin disconnect off
NEXTPNR_NO_CARRY_COUNTER_FIX Disable sum-FF co-location off
NEXTPNR_CARRY_OMIT_GND_DI Legacy GND DI omission (use const-network fix instead) off
NEXTPNR_ARC_MAX_VISIT=<N> Per-arc search cap off
  • CLI: --route-clock-only — route only clock backbone, leave general nets for external router

Examples

  • xilinx/examples/counter25/ — VC707 counter25 example (HW-validated): top.v, top.xdc, build.sh, gen_tb.py, insert_lutbuf.py

Infrastructure

  • Update prjxray-db and nextpnr-xilinx-meta submodules for PCIe and Virtex support
Assets 2
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