New way to decide the IO routing configuration bits #2028
Merged
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
alaindargelas
force-pushed
the
raptor-routing
branch
from
e210358 to
c11749f
Compare
alaindargelas
force-pushed
the
raptor-routing
branch
from
1e0ffab to
561bf2e
Compare
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Together with os-fpga/FOEDAG#1706, this PR drastically change the way IO routing bits setting generation flow:
Old way is to model all the routable resources in device dedicated config mapping file (each device has different resources), and C code read those information and do the routing in C code
New way is to use Python script model the circuitry/block-diagram of routable resouces, during bitstream generation, C code will just need to give enough information to Python script for example: start node, essential node, end node etc, the Python will do the routing based on the model