nav3: stale BOM and title block, and an IC package that is no longer orderable

[peterus]

Found while building toggle3 from nav3 as a template — the inconsistencies came along with the copy and had to be corrected there by hand. nav3 itself is untouched so far.

All claims below were verified against the files on main, not from memory.

1. BOM contradicts the board — wrong IC package

nav3/BOM.md lists U101 as:

Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm

The schematic and the laid-out board both actually carry:

Package_SO:TSSOP-16_4.4x5mm_P0.65mm

The BOM is simply wrong about the built hardware.

2. That package is not orderable

TSSOP-16 is not among the PCF8574 packages stocked at Mouser.at (PDIP-16, SOIC-16, TSSOP-20, TVSOP-20, VQFN-16, VQFN-20). nav3 cannot be rebuilt from its own BOM.

toggle3 resolved this by moving to TI PCF8574ADWR in Package_SO:SOIC-16W_7.5x10.3mm_P1.27mm — 1.27 mm pitch, hand-solderable, and it keeps the 16-pin pinout that the 20-pin variants renumber. Rationale is written up in toggle3/BOM.md under "Package choice". nav3 should follow, which also makes the BOM accidentally correct.

Note when ordering: the A variant is required. Plain PCF8574DWR has address base 0b0100xxx → 0x20, not the 0x38 this design uses.

3. Board-size rationale rests on the wrong premise

parts/pcb_subpanel.scad:31:

NAV_PCB_SIZE = [32, 30];   // ... 30mm height accommodates SOIC-16W IC on B.Cu under the switch row ...

The board does not have a SOIC-16W on it. The 30 mm is presumably right — mount holes and the connector drive it — but the stated reason is not. Worth correcting so the next board is not sized against a false constraint. (Moving nav3 to SOIC-16W per item 2 would make the comment true, which is a tidy outcome but should be a deliberate one.)

4. Title block has two wrong facts

nav3.kicad_sch, comment 1:

PCF8574A I²C address 0x3F  •  3× tact switches  •  4-pin I²C cable to main PCB

• Address is 0x38, not 0x3F. With A0/A1/A2 tied to GND the PCF8574A sits at 0x38; 0x3F would require all three address pins high. BOM.md, PCB_DESIGN_BRIEF.md and the firmware all say 0x38.
• The cable is 5-pin, not 4-pin. It is a JST-XH B5B carrying 3V3, GND, SDA, SCL and /INT — the /INT line is exactly what makes the interrupt-driven design work.

Both were corrected in toggle3; nav3 still has them.

5. Not a defect: the three DRC warnings

For the record, since project_get_next_action() reports "DRC violations: 3" and it looks alarming. A fresh kicad-cli-10 pcb drc gives:

violations: 3   (all lib_footprint_mismatch)
unconnected_items: 0
schematic_parity: 0

All three are the KiCad 9 → 10 library drift on C_0805_2012Metric, TSSOP-16_4.4x5mm_P0.65mm and JST_XH_B5B-XH-A_1x05_P2.50mm_Vertical. The board was laid out under KiCad 9 and KiCad 10's footprint library differs. No electrical defects. Clears with Tools → Update Footprints from Library.

This also extends the note in .claude/skills/kicad-hardware/references/kicad-environment.md, which currently documents the KiCad 9/10 split for symbols only — it affects footprints the same way.

Scope

• Move U101 to PCF8574ADWR / SOIC-16W_7.5x10.3mm_P1.27mm (schematic + board + BOM)
• Fix the title block: 0x38, 5-pin cable
• Fix or requalify the NAV_PCB_SIZE comment in parts/pcb_subpanel.scad
• Update footprints from library to clear the three DRC warnings
• Extend the environment reference to say the KiCad 9/10 split hits footprints too

The package change touches the laid-out board, so it is not a docs-only fix — the SOIC-16W is considerably larger than the TSSOP-16 and will need placement rework on B.Cu.

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