enable inline asm for mxfp8+rceil+compile+cuda+sm100 - #4282
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Summary: PyTorch Core support for compile fusing `inline_asm_elementwise` into surrounding ops landed in pytorch/pytorch#177922 This PR modifies the mxfp8 RCEIL cast to use the `cvt.rp.satfinite.ue8m0x2.f32` instruction when the hardware supports it. Cast mem bw 3.7 TB/s -> 4.1 TB/s Test Plan: ``` // correctness pytest test/prototype/mx_formats -s // cast perf TORCHINDUCTOR_FORCE_DISABLE_CACHES=1 python benchmarks/mx_formats/cast_bench.py --mode dim0_mxfp8_rceil ... // before mem_bw_gbps 3676.9529733517074 // after mem_bw_gbps 4116.556410292409 // microbenchmark perf - see PR doc update, we see small speedups across // the board on relu->linear benchmark ``` ghstack-source-id: be9a5e2 ghstack-comment-id: 4252680990 Pull-Request: #4282
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/ao/4282
Note: Links to docs will display an error until the docs builds have been completed. ✅ No FailuresAs of commit f11cf9d with merge base 00ef369 ( This comment was automatically generated by Dr. CI and updates every 15 minutes. |
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| # `torch.compiler.is_compiling()` returns False. | ||
| # Note that we need both checks, as neither of them work in both benchmark | ||
| # and e2e use cases by themselves. | ||
| (torch.compiler.is_compiling() or is_fake(descale)) |
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this is not super intuitive, but it works
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Summary: PyTorch Core support for compile fusing `inline_asm_elementwise` into surrounding ops landed in pytorch/pytorch#177922 This PR modifies the mxfp8 RCEIL cast to use the `cvt.rp.satfinite.ue8m0x2.f32` instruction when the hardware supports it. Cast mem bw 3.7 TB/s -> 4.1 TB/s Test Plan: ``` // correctness pytest test/prototype/mx_formats -s // cast perf TORCHINDUCTOR_FORCE_DISABLE_CACHES=1 python benchmarks/mx_formats/cast_bench.py --mode dim0_mxfp8_rceil ... // before mem_bw_gbps 3676.9529733517074 // after mem_bw_gbps 4116.556410292409 // microbenchmark perf - see PR doc update, we see small speedups across // the board on relu->linear benchmark ``` ghstack-source-id: e220999 ghstack-comment-id: 4252680990 Pull-Request: #4282
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Summary:
PyTorch Core support for compile fusing
inline_asm_elementwiseintosurrounding ops landed in pytorch/pytorch#177922
This PR modifies the mxfp8 RCEIL cast to use the
cvt.rp.satfinite.ue8m0x2.f32instruction when the hardware supportsit.
Cast mem bw 3.7 TB/s -> 4.1 TB/s
Test Plan: