-
-
Notifications
You must be signed in to change notification settings - Fork 14.2k
Add new Tier 3 targets for ARMv6 #150138
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
base: main
Are you sure you want to change the base?
Add new Tier 3 targets for ARMv6 #150138
Conversation
|
cc @Amanieu, @folkertdev, @sayantn These commits modify compiler targets. Some changes occurred in src/doc/rustc/src/platform-support cc @Noratrieb |
This comment has been minimized.
This comment has been minimized.
Three targets, covering A32 and T32 instructions, and soft-float and hard-float ABIs. Hard-float and atomics not available in Thumb mode.
696697d to
32cd8e5
Compare
|
Force pushed with fixed formatting |
Targets added in rust-lang/rust#150138. Tested with local build of rustc.
|
The job Click to see the possible cause of the failure (guessed by this bot) |
| target_feature = "v6", | ||
| all(target_feature = "v6k", not(target_feature = "thumb-mode")), | ||
| target_feature = "v6t2", | ||
| all(target_feature = "v6", target_feature = "mclass"), | ||
| target_feature = "v7", |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Q: I believe that it is, but where would I go to verify that the cfg here is correct?
| [`AtomicU8`](https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicU8.html) | ||
| [`AtomicI8`](https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicI8.html) |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Nit: Fix broken doc links:
| [`AtomicU8`](https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicU8.html) | |
| [`AtomicI8`](https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicI8.html) | |
| [`AtomicU8`]: https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicU8.html | |
| [`AtomicI8`]: https://docs.rust-lang.org/stable/core/sync/atomic/struct.AtomicI8.html |
|
I think the naming is good. I have reviewed it myself, and would r+, but our policy is that new targets should be approved by a compiler lead, so: r? compiler_leads |
Adds three new targets to support ARMv6 processors running bare-metal:
armv6-none-eabi- Arm ISA, soft-floatarmv6-none-eabihf- Arm ISA, hard-floatthumbv6-none-eabi- Thumb-1 ISA, soft-floatThere is no
thumbv6-none-eabihftarget because as far as I can tell, hard-float isn't support with the Thumb-1 instruction set (and you need the ARMv6T2 extension to enable Thumb-2 support).The targets require ARMv6K as a minimum, which allows the two Arm ISA targets to have full CAS atomics. LLVM has a bug which means it emits some ARMv6K instructions even if you only call for ARMv6, and as no-one else has noticed the bug, and because basically all ARMv6 processors have ARMv6K, I think this is fine. The Thumb target also doesn't have any kind of atomics, just like the Armv5TE and Armv4 targets, because LLVM was emitting library calls to emulate them.
Testing will be added to https://github.com/rust-embedded/aarch32 once the target is accepted. I already have tests for the other non-M arm-none-eabi targets, and those tests pass on these targets.
I have listed myself. If accepted, I'll talk to the Embedded Devices Working Group about adding this one to the rosta with all the others they support.
You might prefer
arm-none-eabi, becausearm-unknown-linux-gnuis an ARMv6 target - the implicit rule seems to be that if the Arm architecture version isn't specified, it's assumed to be v6. However,armv6-none-eabiseemed to fit better betweenarmv5te-none-eabiandarmv7a/armv7r-none-eabi.The hamming distance between
thumbv6-none-eabiandthumbv6m-none-eabiis unfortunately low, but I don't know how to make it better. They are the ARMv6 and ARMv6-M targets, and its perhaps not worse thanarmv7a-none-eabiandarmv7r-none-eabi.No different to any other arm-none-eabi target.
Noted.
Same as other arm-none-eabi targets.
Same as other arm-none-eabi targets.
Noted.
Noted
Noted