dsd_cpu

this is my project to design a 16-bit cpu that can support add and sub

Name		Name	Last commit message	Last commit date
DSD_Practice3_Documentation.pdf		DSD_Practice3_Documentation.pdf
README.md		README.md
add_sub_unit.v		add_sub_unit.v
alu.v		alu.v
carry_select_adder.v		carry_select_adder.v
carry_select_block.v		carry_select_block.v
control_unit.v		control_unit.v
four-bit-adder.v		four-bit-adder.v
full_adder.v		full_adder.v
processor_top.v		processor_top.v
register_file.v		register_file.v
tb_processor_top.v		tb_processor_top.v
unified_memory.v		unified_memory.v

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