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GPU hang on Intel (ANV): the block search's cross-subgroup sums and minimums assumed two
subgroups of 32 lanes, so on the 8- or 16-lane subgroups ANV picks the early-outs differed
between subgroups and the group split at its next barrier. They now combine however many
subgroups the driver chose, through shared memory indexed by subgroup id; the same on RADV.
The scene change detector's divergence pass runs before the coarsest search again instead
of alongside it: that search returns early on a cut, and reading the verdict while it was
being written could split a group the same way.
The scene change detector's shared-memory reductions ran their last six steps without
barriers, which only holds when the first 32 lanes are one subgroup; on Intel's 8- and
16-lane subgroups a lane could read a partial sum before it was written, so the detector's
value was wrong. Every step now has a barrier.
Generation checks what the flow shaders need before starting instead of failing inside them:
subgroup basic, arithmetic and quad operations in compute, and storage support for the r8ui luma and rg16i flow images; a device without them gets a log line and repeated
frames. The device line at debug level shows the subgroup size and operations.